283 	write_reg_high(ioaddr, CMR1, CMR1h_RESET);  in atp_probe1()
311 	write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);	/* Enable Tx and Rx. */  in atp_probe1()
320 	write_reg_high(ioaddr, CMR1, CMR1h_TxRxOFF); /* Disable Tx and Rx units. */  in atp_probe1()
338 	write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);  in atp_probe1()
407 		write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_LOW);  in eeprom_op()
408 		write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_HIGH);  in eeprom_op()
413 	write_reg_high(ioaddr, PROM_CMD, EE_CLK_LOW & ~EE_CS);  in eeprom_op()
463 	write_reg_high(ioaddr, CMR1, CMR1h_RESET);  in hardware_init()
468 	write_reg_high(ioaddr, CMR2, lp->addr_mode);  in hardware_init()
476     write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);  in hardware_init()
483     write_reg_high(ioaddr, IMR, ISRh_RxErr);  in hardware_init()
569 	write_reg_high(ioaddr, IMR, 0);  in atp_send_packet()
584 	write_reg_high(ioaddr, IMR, ISRh_RxErr);  in atp_send_packet()
631 					write_reg_high(ioaddr, CMR2, CMR2h_OFF);  in atp_interrupt()
634 					write_reg_high(ioaddr, ISR, ISRh_RxErr);  in atp_interrupt()
635 					write_reg_high(ioaddr, CMR2, lp->addr_mode);  in atp_interrupt()
703 	write_reg_high(ioaddr, IMR, ISRh_RxErr); 			/* Hmmm, really needed? */  in atp_interrupt()
773 			write_reg_high(ioaddr, CMR1, CMR1h_TxENABLE);  in net_rx()
774 			write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);  in net_rx()
836 	write_reg_high(ioaddr, CMR2, CMR2h_OFF);  in net_close()
843 	write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);  in net_close()
860 	write_reg_high(ioaddr, CMR2, lp->addr_mode);  in set_rx_mode()