142 	return !(ql_read32(qdev, SEM) & sem_bits);  in ql_sem_trylock()
159 	ql_read32(qdev, SEM);	/* flush */  in ql_sem_unlock()
173 		temp = ql_read32(qdev, reg);  in ql_wait_reg_rdy()
200 		temp = ql_read32(qdev, CFG);  in ql_wait_cfg()
286 			*value++ = ql_read32(qdev, MAC_ADDR_DATA);  in ql_get_mac_addr_reg()
300 			*value++ = ql_read32(qdev, MAC_ADDR_DATA);  in ql_get_mac_addr_reg()
315 				*value++ = ql_read32(qdev, MAC_ADDR_DATA);  in ql_get_mac_addr_reg()
510 	*value = ql_read32(qdev, RT_DATA);  in ql_get_routing_reg()
646 		var = ql_read32(qdev, STS);  in ql_enable_completion_interrupt()
654 		var = ql_read32(qdev, STS);  in ql_enable_completion_interrupt()
676 		var = ql_read32(qdev, STS);  in ql_disable_completion_interrupt()
740 	*data = cpu_to_le32(ql_read32(qdev, FLASH_DATA));  in ql_read_flash_word()
899 	*data = ql_read32(qdev, XGMAC_DATA);  in ql_read_xgmac_reg()
2519 		var = ql_read32(qdev, ERR_STS);  in qlge_isr()
2529 		(ql_read32(qdev, INTR_MASK) & INTR_MASK_PI)) {  in qlge_isr()
2548 	var = ql_read32(qdev, ISR1);  in qlge_isr()
3734 	set = ql_read32(qdev, STS);  in ql_cam_route_initialize()
3796 	value = ql_read32(qdev, MGMT_RCV_CFG);  in ql_adapter_initialize()
3892 		value = ql_read32(qdev, RST_FO);  in ql_adapter_reset()
4033 	if ((ql_read32(qdev, STS) & qdev->port_init) &&  in ql_adapter_up()
4034 			(ql_read32(qdev, STS) & qdev->port_link_up))  in ql_adapter_up()
4521 	    (ql_read32(qdev, STS) & STS_FUNC_ID_MASK) >> STS_FUNC_ID_SHIFT;  in ql_get_board_info()
4543 	qdev->chip_rev_id = ql_read32(qdev, REV_ID);  in ql_get_board_info()
4724 	var = ql_read32(qdev, STS);  in ql_timer()