Lines Matching refs:yp
567 struct yellowfin_private *yp = netdev_priv(dev); in yellowfin_open() local
568 const int irq = yp->pci_dev->irq; in yellowfin_open()
569 void __iomem *ioaddr = yp->base; in yellowfin_open()
583 iowrite32(yp->rx_ring_dma, ioaddr + RxPtr); in yellowfin_open()
584 iowrite32(yp->tx_ring_dma, ioaddr + TxPtr); in yellowfin_open()
605 yp->tx_threshold = 32; in yellowfin_open()
606 iowrite32(yp->tx_threshold, ioaddr + TxThreshold); in yellowfin_open()
609 dev->if_port = yp->default_port; in yellowfin_open()
614 if (yp->drv_flags & IsGigabit) { in yellowfin_open()
616 yp->full_duplex = 1; in yellowfin_open()
621 iowrite16(0x101C | (yp->full_duplex ? 2 : 0), ioaddr + Cnfg); in yellowfin_open()
636 init_timer(&yp->timer); in yellowfin_open()
637 yp->timer.expires = jiffies + 3*HZ; in yellowfin_open()
638 yp->timer.data = (unsigned long)dev; in yellowfin_open()
639 yp->timer.function = yellowfin_timer; /* timer handler */ in yellowfin_open()
640 add_timer(&yp->timer); in yellowfin_open()
652 struct yellowfin_private *yp = netdev_priv(dev); in yellowfin_timer() local
653 void __iomem *ioaddr = yp->base; in yellowfin_timer()
661 if (yp->mii_cnt) { in yellowfin_timer()
662 int bmsr = mdio_read(ioaddr, yp->phys[0], MII_BMSR); in yellowfin_timer()
663 int lpa = mdio_read(ioaddr, yp->phys[0], MII_LPA); in yellowfin_timer()
664 int negotiated = lpa & yp->advertising; in yellowfin_timer()
667 yp->phys[0], bmsr, lpa); in yellowfin_timer()
669 yp->full_duplex = mii_duplex(yp->duplex_lock, negotiated); in yellowfin_timer()
671 iowrite16(0x101C | (yp->full_duplex ? 2 : 0), ioaddr + Cnfg); in yellowfin_timer()
679 yp->timer.expires = jiffies + next_tick; in yellowfin_timer()
680 add_timer(&yp->timer); in yellowfin_timer()
685 struct yellowfin_private *yp = netdev_priv(dev); in yellowfin_tx_timeout() local
686 void __iomem *ioaddr = yp->base; in yellowfin_tx_timeout()
689 yp->cur_tx, yp->dirty_tx, in yellowfin_tx_timeout()
696 pr_warn(" Rx ring %p: ", yp->rx_ring); in yellowfin_tx_timeout()
698 pr_cont(" %08x", yp->rx_ring[i].result_status); in yellowfin_tx_timeout()
700 pr_warn(" Tx ring %p: ", yp->tx_ring); in yellowfin_tx_timeout()
703 yp->tx_status[i].tx_errs, in yellowfin_tx_timeout()
704 yp->tx_ring[i].result_status); in yellowfin_tx_timeout()
713 iowrite32(0x10001000, yp->base + TxCtrl); in yellowfin_tx_timeout()
714 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE) in yellowfin_tx_timeout()
724 struct yellowfin_private *yp = netdev_priv(dev); in yellowfin_init_ring() local
727 yp->tx_full = 0; in yellowfin_init_ring()
728 yp->cur_rx = yp->cur_tx = 0; in yellowfin_init_ring()
729 yp->dirty_tx = 0; in yellowfin_init_ring()
731 yp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32); in yellowfin_init_ring()
734 yp->rx_ring[i].dbdma_cmd = in yellowfin_init_ring()
735 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | yp->rx_buf_sz); in yellowfin_init_ring()
736 yp->rx_ring[i].branch_addr = cpu_to_le32(yp->rx_ring_dma + in yellowfin_init_ring()
741 struct sk_buff *skb = netdev_alloc_skb(dev, yp->rx_buf_sz + 2); in yellowfin_init_ring()
742 yp->rx_skbuff[i] = skb; in yellowfin_init_ring()
746 yp->rx_ring[i].addr = cpu_to_le32(pci_map_single(yp->pci_dev, in yellowfin_init_ring()
747 skb->data, yp->rx_buf_sz, PCI_DMA_FROMDEVICE)); in yellowfin_init_ring()
751 dev_kfree_skb(yp->rx_skbuff[j]); in yellowfin_init_ring()
754 yp->rx_ring[i-1].dbdma_cmd = cpu_to_le32(CMD_STOP); in yellowfin_init_ring()
755 yp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); in yellowfin_init_ring()
761 yp->tx_skbuff[i] = NULL; in yellowfin_init_ring()
762 yp->tx_ring[i].dbdma_cmd = cpu_to_le32(CMD_STOP); in yellowfin_init_ring()
763 yp->tx_ring[i].branch_addr = cpu_to_le32(yp->tx_ring_dma + in yellowfin_init_ring()
767 yp->tx_ring[--i].dbdma_cmd = cpu_to_le32(CMD_STOP | BRANCH_ALWAYS); in yellowfin_init_ring()
773 yp->tx_skbuff[i] = 0; in yellowfin_init_ring()
775 yp->tx_ring[j].dbdma_cmd = cpu_to_le32(CMD_STOP); in yellowfin_init_ring()
776 yp->tx_ring[j].branch_addr = cpu_to_le32(yp->tx_ring_dma + in yellowfin_init_ring()
779 if (yp->flags & FullTxStatus) { in yellowfin_init_ring()
780 yp->tx_ring[j].dbdma_cmd = in yellowfin_init_ring()
781 cpu_to_le32(CMD_TXSTATUS | sizeof(*yp->tx_status)); in yellowfin_init_ring()
782 yp->tx_ring[j].request_cnt = sizeof(*yp->tx_status); in yellowfin_init_ring()
783 yp->tx_ring[j].addr = cpu_to_le32(yp->tx_status_dma + in yellowfin_init_ring()
787 yp->tx_ring[j].dbdma_cmd = in yellowfin_init_ring()
789 yp->tx_ring[j].request_cnt = 2; in yellowfin_init_ring()
791 yp->tx_ring[j].addr = cpu_to_le32(yp->tx_status_dma + in yellowfin_init_ring()
793 &(yp->tx_status[0].tx_errs) - in yellowfin_init_ring()
794 &(yp->tx_status[0])); in yellowfin_init_ring()
796 yp->tx_ring[j].branch_addr = cpu_to_le32(yp->tx_ring_dma + in yellowfin_init_ring()
800 yp->tx_ring[++j].dbdma_cmd |= cpu_to_le32(BRANCH_ALWAYS | INTR_ALWAYS); in yellowfin_init_ring()
803 yp->tx_tail_desc = &yp->tx_status[0]; in yellowfin_init_ring()
810 struct yellowfin_private *yp = netdev_priv(dev); in yellowfin_start_xmit() local
820 entry = yp->cur_tx % TX_RING_SIZE; in yellowfin_start_xmit()
828 yp->tx_skbuff[entry] = NULL; in yellowfin_start_xmit()
834 yp->tx_skbuff[entry] = skb; in yellowfin_start_xmit()
837 yp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev, in yellowfin_start_xmit()
839 yp->tx_ring[entry].result_status = 0; in yellowfin_start_xmit()
842 yp->tx_ring[0].dbdma_cmd = cpu_to_le32(CMD_STOP); in yellowfin_start_xmit()
843 yp->tx_ring[TX_RING_SIZE-1].dbdma_cmd = in yellowfin_start_xmit()
846 yp->tx_ring[entry+1].dbdma_cmd = cpu_to_le32(CMD_STOP); in yellowfin_start_xmit()
847 yp->tx_ring[entry].dbdma_cmd = in yellowfin_start_xmit()
850 yp->cur_tx++; in yellowfin_start_xmit()
852 yp->tx_ring[entry<<1].request_cnt = len; in yellowfin_start_xmit()
853 yp->tx_ring[entry<<1].addr = cpu_to_le32(pci_map_single(yp->pci_dev, in yellowfin_start_xmit()
858 yp->cur_tx++; in yellowfin_start_xmit()
860 unsigned next_entry = yp->cur_tx % TX_RING_SIZE; in yellowfin_start_xmit()
861 yp->tx_ring[next_entry<<1].dbdma_cmd = cpu_to_le32(CMD_STOP); in yellowfin_start_xmit()
865 yp->tx_ring[entry<<1].dbdma_cmd = in yellowfin_start_xmit()
873 iowrite32(0x10001000, yp->base + TxCtrl); in yellowfin_start_xmit()
875 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE) in yellowfin_start_xmit()
878 yp->tx_full = 1; in yellowfin_start_xmit()
882 yp->cur_tx, entry); in yellowfin_start_xmit()
892 struct yellowfin_private *yp; in yellowfin_interrupt() local
897 yp = netdev_priv(dev); in yellowfin_interrupt()
898 ioaddr = yp->base; in yellowfin_interrupt()
900 spin_lock (&yp->lock); in yellowfin_interrupt()
919 for (; yp->cur_tx - yp->dirty_tx > 0; yp->dirty_tx++) { in yellowfin_interrupt()
920 int entry = yp->dirty_tx % TX_RING_SIZE; in yellowfin_interrupt()
923 if (yp->tx_ring[entry].result_status == 0) in yellowfin_interrupt()
925 skb = yp->tx_skbuff[entry]; in yellowfin_interrupt()
929 pci_unmap_single(yp->pci_dev, le32_to_cpu(yp->tx_ring[entry].addr), in yellowfin_interrupt()
932 yp->tx_skbuff[entry] = NULL; in yellowfin_interrupt()
934 if (yp->tx_full && in yellowfin_interrupt()
935 yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE - 4) { in yellowfin_interrupt()
937 yp->tx_full = 0; in yellowfin_interrupt()
941 if ((intr_status & IntrTxDone) || (yp->tx_tail_desc->tx_errs)) { in yellowfin_interrupt()
942 unsigned dirty_tx = yp->dirty_tx; in yellowfin_interrupt()
944 for (dirty_tx = yp->dirty_tx; yp->cur_tx - dirty_tx > 0; in yellowfin_interrupt()
948 u16 tx_errs = yp->tx_status[entry].tx_errs; in yellowfin_interrupt()
955 yp->tx_status[entry].tx_cnt, in yellowfin_interrupt()
956 yp->tx_status[entry].tx_errs, in yellowfin_interrupt()
957 yp->tx_status[entry].total_tx_cnt, in yellowfin_interrupt()
958 yp->tx_status[entry].paused); in yellowfin_interrupt()
962 skb = yp->tx_skbuff[entry]; in yellowfin_interrupt()
986 pci_unmap_single(yp->pci_dev, in yellowfin_interrupt()
987 yp->tx_ring[entry<<1].addr, skb->len, in yellowfin_interrupt()
990 yp->tx_skbuff[entry] = 0; in yellowfin_interrupt()
992 yp->tx_status[entry].tx_errs = 0; in yellowfin_interrupt()
996 if (yp->cur_tx - dirty_tx > TX_RING_SIZE) { in yellowfin_interrupt()
998 dirty_tx, yp->cur_tx, yp->tx_full); in yellowfin_interrupt()
1003 if (yp->tx_full && in yellowfin_interrupt()
1004 yp->cur_tx - dirty_tx < TX_QUEUE_SIZE - 2) { in yellowfin_interrupt()
1006 yp->tx_full = 0; in yellowfin_interrupt()
1010 yp->dirty_tx = dirty_tx; in yellowfin_interrupt()
1011 yp->tx_tail_desc = &yp->tx_status[dirty_tx % TX_RING_SIZE]; in yellowfin_interrupt()
1030 spin_unlock (&yp->lock); in yellowfin_interrupt()
1038 struct yellowfin_private *yp = netdev_priv(dev); in yellowfin_rx() local
1039 int entry = yp->cur_rx % RX_RING_SIZE; in yellowfin_rx()
1040 int boguscnt = yp->dirty_rx + RX_RING_SIZE - yp->cur_rx; in yellowfin_rx()
1044 entry, yp->rx_ring[entry].result_status); in yellowfin_rx()
1046 entry, yp->rx_ring[entry].dbdma_cmd, yp->rx_ring[entry].addr, in yellowfin_rx()
1047 yp->rx_ring[entry].result_status); in yellowfin_rx()
1052 struct yellowfin_desc *desc = &yp->rx_ring[entry]; in yellowfin_rx()
1053 struct sk_buff *rx_skb = yp->rx_skbuff[entry]; in yellowfin_rx()
1061 pci_dma_sync_single_for_cpu(yp->pci_dev, le32_to_cpu(desc->addr), in yellowfin_rx()
1062 yp->rx_buf_sz, PCI_DMA_FROMDEVICE); in yellowfin_rx()
1081 } else if ((yp->drv_flags & IsGigabit) && (frame_status & 0x0038)) { in yellowfin_rx()
1091 } else if ( !(yp->drv_flags & IsGigabit) && in yellowfin_rx()
1101 } else if ((yp->flags & HasMACAddrBug) && in yellowfin_rx()
1102 !ether_addr_equal(le32_to_cpu(yp->rx_ring_dma + in yellowfin_rx()
1105 !ether_addr_equal(le32_to_cpu(yp->rx_ring_dma + in yellowfin_rx()
1115 (yp->chip_id ? 7 : 8 + buf_addr[data_size - 8]); in yellowfin_rx()
1127 pci_unmap_single(yp->pci_dev, in yellowfin_rx()
1128 le32_to_cpu(yp->rx_ring[entry].addr), in yellowfin_rx()
1129 yp->rx_buf_sz, in yellowfin_rx()
1131 yp->rx_skbuff[entry] = NULL; in yellowfin_rx()
1139 pci_dma_sync_single_for_device(yp->pci_dev, in yellowfin_rx()
1141 yp->rx_buf_sz, in yellowfin_rx()
1149 entry = (++yp->cur_rx) % RX_RING_SIZE; in yellowfin_rx()
1153 for (; yp->cur_rx - yp->dirty_rx > 0; yp->dirty_rx++) { in yellowfin_rx()
1154 entry = yp->dirty_rx % RX_RING_SIZE; in yellowfin_rx()
1155 if (yp->rx_skbuff[entry] == NULL) { in yellowfin_rx()
1156 struct sk_buff *skb = netdev_alloc_skb(dev, yp->rx_buf_sz + 2); in yellowfin_rx()
1159 yp->rx_skbuff[entry] = skb; in yellowfin_rx()
1161 yp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev, in yellowfin_rx()
1162 skb->data, yp->rx_buf_sz, PCI_DMA_FROMDEVICE)); in yellowfin_rx()
1164 yp->rx_ring[entry].dbdma_cmd = cpu_to_le32(CMD_STOP); in yellowfin_rx()
1165 yp->rx_ring[entry].result_status = 0; /* Clear complete bit. */ in yellowfin_rx()
1167 yp->rx_ring[entry - 1].dbdma_cmd = in yellowfin_rx()
1168 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | yp->rx_buf_sz); in yellowfin_rx()
1170 yp->rx_ring[RX_RING_SIZE - 1].dbdma_cmd = in yellowfin_rx()
1172 | yp->rx_buf_sz); in yellowfin_rx()
1190 struct yellowfin_private *yp = netdev_priv(dev); in yellowfin_close() local
1191 void __iomem *ioaddr = yp->base; in yellowfin_close()
1202 yp->cur_tx, yp->dirty_tx, in yellowfin_close()
1203 yp->cur_rx, yp->dirty_rx); in yellowfin_close()
1213 del_timer(&yp->timer); in yellowfin_close()
1218 (unsigned long long)yp->tx_ring_dma); in yellowfin_close()
1221 ioread32(ioaddr + TxPtr) == (long)&yp->tx_ring[i] ? '>' : ' ', in yellowfin_close()
1222 i, yp->tx_ring[i].dbdma_cmd, yp->tx_ring[i].addr, in yellowfin_close()
1223 yp->tx_ring[i].branch_addr, yp->tx_ring[i].result_status); in yellowfin_close()
1224 printk(KERN_DEBUG " Tx status %p:\n", yp->tx_status); in yellowfin_close()
1227 i, yp->tx_status[i].tx_cnt, yp->tx_status[i].tx_errs, in yellowfin_close()
1228 yp->tx_status[i].total_tx_cnt, yp->tx_status[i].paused); in yellowfin_close()
1231 (unsigned long long)yp->rx_ring_dma); in yellowfin_close()
1234 ioread32(ioaddr + RxPtr) == (long)&yp->rx_ring[i] ? '>' : ' ', in yellowfin_close()
1235 i, yp->rx_ring[i].dbdma_cmd, yp->rx_ring[i].addr, in yellowfin_close()
1236 yp->rx_ring[i].result_status); in yellowfin_close()
1238 if (get_unaligned((u8*)yp->rx_ring[i].addr) != 0x69) { in yellowfin_close()
1244 get_unaligned(((u16*)yp->rx_ring[i].addr) + j)); in yellowfin_close()
1252 free_irq(yp->pci_dev->irq, dev); in yellowfin_close()
1256 yp->rx_ring[i].dbdma_cmd = cpu_to_le32(CMD_STOP); in yellowfin_close()
1257 yp->rx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */ in yellowfin_close()
1258 if (yp->rx_skbuff[i]) { in yellowfin_close()
1259 dev_kfree_skb(yp->rx_skbuff[i]); in yellowfin_close()
1261 yp->rx_skbuff[i] = NULL; in yellowfin_close()
1264 if (yp->tx_skbuff[i]) in yellowfin_close()
1265 dev_kfree_skb(yp->tx_skbuff[i]); in yellowfin_close()
1266 yp->tx_skbuff[i] = NULL; in yellowfin_close()
1283 struct yellowfin_private *yp = netdev_priv(dev); in set_rx_mode() local
1284 void __iomem *ioaddr = yp->base; in set_rx_mode()
1306 if (yp->drv_flags & HasMulticastBug) { in set_rx_mode()