Lines Matching refs:NVREG_IRQSTAT_MASK
109 #define NVREG_IRQSTAT_MASK 0x83ff macro
2662 status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; in nv_tx_timeout()
2664 status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; in nv_tx_timeout()
3886 events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK; in nv_nic_irq_test()
3889 events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK; in nv_nic_irq_test()
4138 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_do_nic_poll()
4140 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); in nv_do_nic_poll()
5009 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_interrupt_test()
5011 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); in nv_interrupt_test()
5179 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_self_test()
5181 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus); in nv_self_test()
5412 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_open()
5463 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus); in nv_open()