202 	__raw_writel(val, ether->reg + REG_MCMDR);  in update_linkspeed_register()
275 	__raw_writel(lsw, ether->reg + REG_CAML_BASE + x * CAM_ENTRY_SIZE);  in w90p910_write_cam()
276 	__raw_writel(msw, ether->reg + REG_CAMM_BASE + x * CAM_ENTRY_SIZE);  in w90p910_write_cam()
349 	__raw_writel(val, ether->reg + REG_FFTCR);  in w90p910_set_fifo_threshold()
359 	__raw_writel(val, ether->reg + REG_MCMDR);  in w90p910_return_default_idle()
366 	__raw_writel(ENSTART, ether->reg + REG_RSDR);  in w90p910_trigger_rx()
373 	__raw_writel(ENSTART, ether->reg + REG_TSDR);  in w90p910_trigger_tx()
384 	__raw_writel(val, ether->reg + REG_MIEN);  in w90p910_enable_mac_interrupt()
393 	__raw_writel(*val, ether->reg + REG_MISTA);  in w90p910_get_and_clear_int()
403 	__raw_writel(val, ether->reg + REG_MCMDR);  in w90p910_set_global_maccmd()
415 	__raw_writel(val, ether->reg + REG_CAMEN);  in w90p910_enable_cam()
424 	__raw_writel(val, ether->reg + REG_CAMCMR);  in w90p910_enable_cam_command()
439 	__raw_writel(val, ether->reg + REG_MCMDR);  in w90p910_enable_tx()
454 	__raw_writel(val, ether->reg + REG_MCMDR);  in w90p910_enable_rx()
461 	__raw_writel(ether->start_rx_ptr, ether->reg + REG_RXDLSA);  in w90p910_set_curdest()
462 	__raw_writel(ether->start_tx_ptr, ether->reg + REG_TXDLSA);  in w90p910_set_curdest()
508 	__raw_writel(data, ether->reg + REG_MIID);  in w90p910_mdio_write()
512 	__raw_writel(val, ether->reg + REG_MIIDA);  in w90p910_mdio_write()
533 	__raw_writel(val, ether->reg + REG_MIIDA);  in w90p910_mdio_read()
858 	__raw_writel(rx_mode, ether->reg + REG_CAMCMR);  in w90p910_ether_set_multicast_list()