Lines Matching refs:val64
28 &val64); \
36 u64 val64; in vxge_hw_vpath_set_zero_rx_frm_len() local
38 val64 = readq(&vp_reg->rxmac_vcfg0); in vxge_hw_vpath_set_zero_rx_frm_len()
39 val64 &= ~VXGE_HW_RXMAC_VCFG0_RTS_MAX_FRM_LEN(0x3fff); in vxge_hw_vpath_set_zero_rx_frm_len()
40 writeq(val64, &vp_reg->rxmac_vcfg0); in vxge_hw_vpath_set_zero_rx_frm_len()
41 val64 = readq(&vp_reg->rxmac_vcfg0); in vxge_hw_vpath_set_zero_rx_frm_len()
51 u64 val64, rxd_count, rxd_spat; in vxge_hw_vpath_wait_receive_idle() local
64 val64 = readq(&vp_reg->prc_cfg6); in vxge_hw_vpath_wait_receive_idle()
65 rxd_spat = VXGE_HW_PRC_CFG6_GET_RXD_SPAT(val64) + 1; in vxge_hw_vpath_wait_receive_idle()
79 val64 = readq(&vp_reg->frm_in_progress_cnt); in vxge_hw_vpath_wait_receive_idle()
80 if ((rxd_count <= rxd_spat) || (val64 > 0)) in vxge_hw_vpath_wait_receive_idle()
121 u64 val64; in __vxge_hw_device_register_poll() local
127 val64 = readq(reg); in __vxge_hw_device_register_poll()
128 if (!(val64 & mask)) in __vxge_hw_device_register_poll()
135 val64 = readq(reg); in __vxge_hw_device_register_poll()
136 if (!(val64 & mask)) in __vxge_hw_device_register_poll()
145 __vxge_hw_pio_mem_write64(u64 val64, void __iomem *addr, in __vxge_hw_pio_mem_write64() argument
148 __vxge_hw_pio_mem_write32_lower((u32)vxge_bVALn(val64, 32, 32), addr); in __vxge_hw_pio_mem_write64()
150 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), addr); in __vxge_hw_pio_mem_write64()
163 u64 val64; in vxge_hw_vpath_fw_api() local
176 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(action) | in vxge_hw_vpath_fw_api()
182 status = __vxge_hw_pio_mem_write64(val64, in vxge_hw_vpath_fw_api()
207 val64 = readq(&vp_reg->rts_access_steer_ctrl); in vxge_hw_vpath_fw_api()
208 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) { in vxge_hw_vpath_fw_api()
211 *steer_ctrl = val64; in vxge_hw_vpath_fw_api()
517 u64 val64; in __vxge_hw_legacy_swapper_set() local
520 val64 = readq(&legacy_reg->toc_swapper_fb); in __vxge_hw_legacy_swapper_set()
524 switch (val64) { in __vxge_hw_legacy_swapper_set()
556 val64 = readq(&legacy_reg->toc_swapper_fb); in __vxge_hw_legacy_swapper_set()
558 if (val64 != VXGE_HW_SWAPPER_INITIAL_VALUE) in __vxge_hw_legacy_swapper_set()
572 u64 val64; in __vxge_hw_device_toc_get() local
583 val64 = readq(&legacy_reg->toc_first_pointer); in __vxge_hw_device_toc_get()
584 toc = bar0 + val64; in __vxge_hw_device_toc_get()
598 u64 val64; in __vxge_hw_device_reg_addr_get() local
610 val64 = readq(&hldev->toc_reg->toc_common_pointer); in __vxge_hw_device_reg_addr_get()
611 hldev->common_reg = hldev->bar0 + val64; in __vxge_hw_device_reg_addr_get()
613 val64 = readq(&hldev->toc_reg->toc_mrpcim_pointer); in __vxge_hw_device_reg_addr_get()
614 hldev->mrpcim_reg = hldev->bar0 + val64; in __vxge_hw_device_reg_addr_get()
617 val64 = readq(&hldev->toc_reg->toc_srpcim_pointer[i]); in __vxge_hw_device_reg_addr_get()
618 hldev->srpcim_reg[i] = hldev->bar0 + val64; in __vxge_hw_device_reg_addr_get()
622 val64 = readq(&hldev->toc_reg->toc_vpmgmt_pointer[i]); in __vxge_hw_device_reg_addr_get()
623 hldev->vpmgmt_reg[i] = hldev->bar0 + val64; in __vxge_hw_device_reg_addr_get()
627 val64 = readq(&hldev->toc_reg->toc_vpath_pointer[i]); in __vxge_hw_device_reg_addr_get()
628 hldev->vpath_reg[i] = hldev->bar0 + val64; in __vxge_hw_device_reg_addr_get()
631 val64 = readq(&hldev->toc_reg->toc_kdfc); in __vxge_hw_device_reg_addr_get()
633 switch (VXGE_HW_TOC_GET_KDFC_INITIAL_BIR(val64)) { in __vxge_hw_device_reg_addr_get()
635 hldev->kdfc = hldev->bar0 + VXGE_HW_TOC_GET_KDFC_INITIAL_OFFSET(val64) ; in __vxge_hw_device_reg_addr_get()
706 u64 val64; in __vxge_hw_vpath_func_id_get() local
708 val64 = readq(&vpmgmt_reg->vpath_to_func_map_cfg1); in __vxge_hw_vpath_func_id_get()
711 (u32)VXGE_HW_VPATH_TO_FUNC_MAP_CFG1_GET_VPATH_TO_FUNC_MAP_CFG1(val64); in __vxge_hw_vpath_func_id_get()
720 u64 val64; in __vxge_hw_device_host_info_get() local
723 val64 = readq(&hldev->common_reg->host_type_assignments); in __vxge_hw_device_host_info_get()
726 (u32)VXGE_HW_HOST_TYPE_ASSIGNMENTS_GET_HOST_TYPE_ASSIGNMENTS(val64); in __vxge_hw_device_host_info_get()
1000 u64 val64; in vxge_hw_device_hw_info_get() local
1016 val64 = readq(&toc->toc_common_pointer); in vxge_hw_device_hw_info_get()
1017 common_reg = bar0 + val64; in vxge_hw_device_hw_info_get()
1026 val64 = readq(&common_reg->host_type_assignments); in vxge_hw_device_hw_info_get()
1029 (u32)VXGE_HW_HOST_TYPE_ASSIGNMENTS_GET_HOST_TYPE_ASSIGNMENTS(val64); in vxge_hw_device_hw_info_get()
1035 val64 = readq(&toc->toc_vpmgmt_pointer[i]); in vxge_hw_device_hw_info_get()
1037 vpmgmt_reg = bar0 + val64; in vxge_hw_device_hw_info_get()
1044 val64 = readq(&toc->toc_mrpcim_pointer); in vxge_hw_device_hw_info_get()
1046 mrpcim_reg = bar0 + val64; in vxge_hw_device_hw_info_get()
1052 val64 = readq(&toc->toc_vpath_pointer[i]); in vxge_hw_device_hw_info_get()
1055 vpath.vp_reg = bar0 + val64; in vxge_hw_device_hw_info_get()
1077 val64 = readq(&toc->toc_vpath_pointer[i]); in vxge_hw_device_hw_info_get()
1078 vpath.vp_reg = bar0 + val64; in vxge_hw_device_hw_info_get()
1416 u64 val64; in __vxge_hw_vpath_stats_access() local
1427 val64 = VXGE_HW_XMAC_STATS_ACCESS_CMD_OP(operation) | in __vxge_hw_vpath_stats_access()
1431 status = __vxge_hw_pio_mem_write64(val64, in __vxge_hw_vpath_stats_access()
1451 u64 *val64; in __vxge_hw_vpath_xmac_tx_stats_get() local
1456 val64 = (u64 *)vpath_tx_stats; in __vxge_hw_vpath_xmac_tx_stats_get()
1466 offset, val64); in __vxge_hw_vpath_xmac_tx_stats_get()
1470 val64++; in __vxge_hw_vpath_xmac_tx_stats_get()
1483 u64 *val64; in __vxge_hw_vpath_xmac_rx_stats_get() local
1487 val64 = (u64 *) vpath_rx_stats; in __vxge_hw_vpath_xmac_rx_stats_get()
1496 offset >> 3, val64); in __vxge_hw_vpath_xmac_rx_stats_get()
1501 val64++; in __vxge_hw_vpath_xmac_rx_stats_get()
1514 u64 val64; in __vxge_hw_vpath_stats_get() local
1524 val64 = readq(&vp_reg->vpath_debug_stats0); in __vxge_hw_vpath_stats_get()
1526 (u32)VXGE_HW_VPATH_DEBUG_STATS0_GET_INI_NUM_MWR_SENT(val64); in __vxge_hw_vpath_stats_get()
1528 val64 = readq(&vp_reg->vpath_debug_stats1); in __vxge_hw_vpath_stats_get()
1530 (u32)VXGE_HW_VPATH_DEBUG_STATS1_GET_INI_NUM_MRD_SENT(val64); in __vxge_hw_vpath_stats_get()
1532 val64 = readq(&vp_reg->vpath_debug_stats2); in __vxge_hw_vpath_stats_get()
1534 (u32)VXGE_HW_VPATH_DEBUG_STATS2_GET_INI_NUM_CPL_RCVD(val64); in __vxge_hw_vpath_stats_get()
1536 val64 = readq(&vp_reg->vpath_debug_stats3); in __vxge_hw_vpath_stats_get()
1538 VXGE_HW_VPATH_DEBUG_STATS3_GET_INI_NUM_MWR_BYTE_SENT(val64); in __vxge_hw_vpath_stats_get()
1540 val64 = readq(&vp_reg->vpath_debug_stats4); in __vxge_hw_vpath_stats_get()
1542 VXGE_HW_VPATH_DEBUG_STATS4_GET_INI_NUM_CPL_BYTE_RCVD(val64); in __vxge_hw_vpath_stats_get()
1544 val64 = readq(&vp_reg->vpath_debug_stats5); in __vxge_hw_vpath_stats_get()
1546 (u32)VXGE_HW_VPATH_DEBUG_STATS5_GET_WRCRDTARB_XOFF(val64); in __vxge_hw_vpath_stats_get()
1548 val64 = readq(&vp_reg->vpath_debug_stats6); in __vxge_hw_vpath_stats_get()
1550 (u32)VXGE_HW_VPATH_DEBUG_STATS6_GET_RDCRDTARB_XOFF(val64); in __vxge_hw_vpath_stats_get()
1552 val64 = readq(&vp_reg->vpath_genstats_count01); in __vxge_hw_vpath_stats_get()
1555 val64); in __vxge_hw_vpath_stats_get()
1557 val64 = readq(&vp_reg->vpath_genstats_count01); in __vxge_hw_vpath_stats_get()
1560 val64); in __vxge_hw_vpath_stats_get()
1562 val64 = readq(&vp_reg->vpath_genstats_count23); in __vxge_hw_vpath_stats_get()
1565 val64); in __vxge_hw_vpath_stats_get()
1567 val64 = readq(&vp_reg->vpath_genstats_count01); in __vxge_hw_vpath_stats_get()
1570 val64); in __vxge_hw_vpath_stats_get()
1572 val64 = readq(&vp_reg->vpath_genstats_count4); in __vxge_hw_vpath_stats_get()
1575 val64); in __vxge_hw_vpath_stats_get()
1577 val64 = readq(&vp_reg->vpath_genstats_count5); in __vxge_hw_vpath_stats_get()
1580 val64); in __vxge_hw_vpath_stats_get()
1594 (u32)VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM0(val64); in __vxge_hw_vpath_stats_get()
1597 (u32)VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM1(val64); in __vxge_hw_vpath_stats_get()
1603 (u32)VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM2(val64); in __vxge_hw_vpath_stats_get()
1606 (u32)VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM3(val64); in __vxge_hw_vpath_stats_get()
1608 val64 = readq(&vp_reg->rx_multi_cast_stats); in __vxge_hw_vpath_stats_get()
1610 (u16)VXGE_HW_RX_MULTI_CAST_STATS_GET_FRAME_DISCARD(val64); in __vxge_hw_vpath_stats_get()
1612 val64 = readq(&vp_reg->rx_frm_transferred); in __vxge_hw_vpath_stats_get()
1614 (u32)VXGE_HW_RX_FRM_TRANSFERRED_GET_RX_FRM_TRANSFERRED(val64); in __vxge_hw_vpath_stats_get()
1616 val64 = readq(&vp_reg->rxd_returned); in __vxge_hw_vpath_stats_get()
1618 (u16)VXGE_HW_RXD_RETURNED_GET_RXD_RETURNED(val64); in __vxge_hw_vpath_stats_get()
1620 val64 = readq(&vp_reg->dbg_stats_rx_mpa); in __vxge_hw_vpath_stats_get()
1622 (u16)VXGE_HW_DBG_STATS_GET_RX_MPA_LEN_FAIL_FRMS(val64); in __vxge_hw_vpath_stats_get()
1624 (u16)VXGE_HW_DBG_STATS_GET_RX_MPA_MRK_FAIL_FRMS(val64); in __vxge_hw_vpath_stats_get()
1626 (u16)VXGE_HW_DBG_STATS_GET_RX_MPA_CRC_FAIL_FRMS(val64); in __vxge_hw_vpath_stats_get()
1628 val64 = readq(&vp_reg->dbg_stats_rx_fau); in __vxge_hw_vpath_stats_get()
1630 (u16)VXGE_HW_DBG_STATS_GET_RX_FAU_RX_PERMITTED_FRMS(val64); in __vxge_hw_vpath_stats_get()
1632 (u16)VXGE_HW_DBG_STATS_GET_RX_FAU_RX_VP_RESET_DISCARDED_FRMS(val64); in __vxge_hw_vpath_stats_get()
1634 (u16)VXGE_HW_DBG_STATS_GET_RX_FAU_RX_WOL_FRMS(val64); in __vxge_hw_vpath_stats_get()
1636 val64 = readq(&vp_reg->tx_vp_reset_discarded_frms); in __vxge_hw_vpath_stats_get()
1639 val64); in __vxge_hw_vpath_stats_get()
1699 u64 val64; in vxge_hw_mrpcim_stats_access() local
1707 val64 = VXGE_HW_XMAC_STATS_SYS_CMD_OP(operation) | in vxge_hw_mrpcim_stats_access()
1712 status = __vxge_hw_pio_mem_write64(val64, in vxge_hw_mrpcim_stats_access()
1733 u64 *val64; in vxge_hw_device_xmac_aggr_stats_get() local
1738 val64 = (u64 *)aggr_stats; in vxge_hw_device_xmac_aggr_stats_get()
1749 ((offset + (104 * port)) >> 3), val64); in vxge_hw_device_xmac_aggr_stats_get()
1754 val64++; in vxge_hw_device_xmac_aggr_stats_get()
1768 u64 *val64; in vxge_hw_device_xmac_port_stats_get() local
1772 val64 = (u64 *) port_stats; in vxge_hw_device_xmac_port_stats_get()
1783 ((offset + (608 * port)) >> 3), val64); in vxge_hw_device_xmac_port_stats_get()
1788 val64++; in vxge_hw_device_xmac_port_stats_get()
1909 u64 val64; in vxge_hw_device_getpause_data() local
1927 val64 = readq(&hldev->mrpcim_reg->rxmac_pause_cfg_port[port]); in vxge_hw_device_getpause_data()
1928 if (val64 & VXGE_HW_RXMAC_PAUSE_CFG_PORT_GEN_EN) in vxge_hw_device_getpause_data()
1930 if (val64 & VXGE_HW_RXMAC_PAUSE_CFG_PORT_RCV_EN) in vxge_hw_device_getpause_data()
1944 u64 val64; in vxge_hw_device_setpause_data() local
1962 val64 = readq(&hldev->mrpcim_reg->rxmac_pause_cfg_port[port]); in vxge_hw_device_setpause_data()
1964 val64 |= VXGE_HW_RXMAC_PAUSE_CFG_PORT_GEN_EN; in vxge_hw_device_setpause_data()
1966 val64 &= ~VXGE_HW_RXMAC_PAUSE_CFG_PORT_GEN_EN; in vxge_hw_device_setpause_data()
1968 val64 |= VXGE_HW_RXMAC_PAUSE_CFG_PORT_RCV_EN; in vxge_hw_device_setpause_data()
1970 val64 &= ~VXGE_HW_RXMAC_PAUSE_CFG_PORT_RCV_EN; in vxge_hw_device_setpause_data()
1972 writeq(val64, &hldev->mrpcim_reg->rxmac_pause_cfg_port[port]); in vxge_hw_device_setpause_data()
3078 u64 val64; in __vxge_hw_vpath_swapper_set() local
3080 val64 = readq(&vpath_reg->vpath_general_cfg1); in __vxge_hw_vpath_swapper_set()
3082 val64 |= VXGE_HW_VPATH_GENERAL_CFG1_CTL_BYTE_SWAPEN; in __vxge_hw_vpath_swapper_set()
3083 writeq(val64, &vpath_reg->vpath_general_cfg1); in __vxge_hw_vpath_swapper_set()
3097 u64 val64; in __vxge_hw_kdfc_swapper_set() local
3099 val64 = readq(&legacy_reg->pifm_wr_swap_en); in __vxge_hw_kdfc_swapper_set()
3101 if (val64 == VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE) { in __vxge_hw_kdfc_swapper_set()
3102 val64 = readq(&vpath_reg->kdfcctl_cfg0); in __vxge_hw_kdfc_swapper_set()
3105 val64 |= VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO0 | in __vxge_hw_kdfc_swapper_set()
3109 writeq(val64, &vpath_reg->kdfcctl_cfg0); in __vxge_hw_kdfc_swapper_set()
3581 u64 val64; in __vxge_hw_vpath_pci_read() local
3585 val64 = VXGE_HW_PCI_CONFIG_ACCESS_CFG1_ADDRESS(offset); in __vxge_hw_vpath_pci_read()
3588 val64 |= VXGE_HW_PCI_CONFIG_ACCESS_CFG1_SEL_FUNC0; in __vxge_hw_vpath_pci_read()
3590 writeq(val64, &vp_reg->pci_config_access_cfg1); in __vxge_hw_vpath_pci_read()
3603 val64 = readq(&vp_reg->pci_config_access_status); in __vxge_hw_vpath_pci_read()
3605 if (val64 & VXGE_HW_PCI_CONFIG_ACCESS_STATUS_ACCESS_ERR) { in __vxge_hw_vpath_pci_read()
3609 *val = (u32)vxge_bVALn(val64, 32, 32); in __vxge_hw_vpath_pci_read()
3977 u64 val64; in __vxge_hw_vpath_mgmt_read() local
3981 val64 = readq(&vpath->vpmgmt_reg-> in __vxge_hw_vpath_mgmt_read()
3986 (val64); in __vxge_hw_vpath_mgmt_read()
3993 val64 = readq(&vpath->vpmgmt_reg->xmac_vsport_choices_vp); in __vxge_hw_vpath_mgmt_read()
3996 if (val64 & vxge_mBIT(i)) in __vxge_hw_vpath_mgmt_read()
4000 val64 = readq(&vpath->vpmgmt_reg->xgmac_gen_status_vpmgmt_clone); in __vxge_hw_vpath_mgmt_read()
4002 if (val64 & VXGE_HW_XGMAC_GEN_STATUS_VPMGMT_CLONE_XMACJ_NTWK_OK) in __vxge_hw_vpath_mgmt_read()
4036 u64 val64; in __vxge_hw_vpath_reset() local
4038 val64 = VXGE_HW_CMN_RSTHDLR_CFG0_SW_RESET_VPATH(1 << (16 - vp_id)); in __vxge_hw_vpath_reset()
4040 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), in __vxge_hw_vpath_reset()
4078 u64 val64; in __vxge_hw_vpath_prc_configure() local
4090 val64 = readq(&vp_reg->prc_cfg1); in __vxge_hw_vpath_prc_configure()
4091 val64 |= VXGE_HW_PRC_CFG1_RTI_TINT_DISABLE; in __vxge_hw_vpath_prc_configure()
4092 writeq(val64, &vp_reg->prc_cfg1); in __vxge_hw_vpath_prc_configure()
4094 val64 = readq(&vpath->vp_reg->prc_cfg6); in __vxge_hw_vpath_prc_configure()
4095 val64 |= VXGE_HW_PRC_CFG6_DOORBELL_MODE_EN; in __vxge_hw_vpath_prc_configure()
4096 writeq(val64, &vpath->vp_reg->prc_cfg6); in __vxge_hw_vpath_prc_configure()
4098 val64 = readq(&vp_reg->prc_cfg7); in __vxge_hw_vpath_prc_configure()
4103 val64 &= ~VXGE_HW_PRC_CFG7_SCATTER_MODE(0x3); in __vxge_hw_vpath_prc_configure()
4107 val64 |= VXGE_HW_PRC_CFG7_SCATTER_MODE( in __vxge_hw_vpath_prc_configure()
4111 val64 |= VXGE_HW_PRC_CFG7_SCATTER_MODE( in __vxge_hw_vpath_prc_configure()
4115 val64 |= VXGE_HW_PRC_CFG7_SCATTER_MODE( in __vxge_hw_vpath_prc_configure()
4121 writeq(val64, &vp_reg->prc_cfg7); in __vxge_hw_vpath_prc_configure()
4127 val64 = readq(&vp_reg->prc_cfg4); in __vxge_hw_vpath_prc_configure()
4128 val64 |= VXGE_HW_PRC_CFG4_IN_SVC; in __vxge_hw_vpath_prc_configure()
4129 val64 &= ~VXGE_HW_PRC_CFG4_RING_MODE(0x3); in __vxge_hw_vpath_prc_configure()
4131 val64 |= VXGE_HW_PRC_CFG4_RING_MODE( in __vxge_hw_vpath_prc_configure()
4135 val64 |= VXGE_HW_PRC_CFG4_RTH_DISABLE; in __vxge_hw_vpath_prc_configure()
4137 val64 &= ~VXGE_HW_PRC_CFG4_RTH_DISABLE; in __vxge_hw_vpath_prc_configure()
4139 writeq(val64, &vp_reg->prc_cfg4); in __vxge_hw_vpath_prc_configure()
4150 u64 val64; in __vxge_hw_vpath_kdfc_configure() local
4163 val64 = readq(&vp_reg->kdfc_drbl_triplet_total); in __vxge_hw_vpath_kdfc_configure()
4167 val64+1)/2; in __vxge_hw_vpath_kdfc_configure()
4181 val64 = VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_0( in __vxge_hw_vpath_kdfc_configure()
4185 writeq(val64, &vp_reg->kdfc_fifo_trpl_partition); in __vxge_hw_vpath_kdfc_configure()
4190 val64 = readq(&vp_reg->kdfc_trpl_fifo_0_ctrl); in __vxge_hw_vpath_kdfc_configure()
4192 val64 &= ~(VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE(0x3) | in __vxge_hw_vpath_kdfc_configure()
4195 val64 |= VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE( in __vxge_hw_vpath_kdfc_configure()
4202 writeq(val64, &vp_reg->kdfc_trpl_fifo_0_ctrl); in __vxge_hw_vpath_kdfc_configure()
4223 u64 val64; in __vxge_hw_vpath_mac_configure() local
4237 val64 = readq(&vp_reg->xmac_rpa_vcfg); in __vxge_hw_vpath_mac_configure()
4242 val64 |= VXGE_HW_XMAC_RPA_VCFG_STRIP_VLAN_TAG; in __vxge_hw_vpath_mac_configure()
4244 val64 &= ~VXGE_HW_XMAC_RPA_VCFG_STRIP_VLAN_TAG; in __vxge_hw_vpath_mac_configure()
4247 writeq(val64, &vp_reg->xmac_rpa_vcfg); in __vxge_hw_vpath_mac_configure()
4248 val64 = readq(&vp_reg->rxmac_vcfg0); in __vxge_hw_vpath_mac_configure()
4252 val64 &= ~VXGE_HW_RXMAC_VCFG0_RTS_MAX_FRM_LEN(0x3fff); in __vxge_hw_vpath_mac_configure()
4255 val64 |= VXGE_HW_RXMAC_VCFG0_RTS_MAX_FRM_LEN( in __vxge_hw_vpath_mac_configure()
4259 val64 |= VXGE_HW_RXMAC_VCFG0_RTS_MAX_FRM_LEN( in __vxge_hw_vpath_mac_configure()
4263 writeq(val64, &vp_reg->rxmac_vcfg0); in __vxge_hw_vpath_mac_configure()
4265 val64 = readq(&vp_reg->rxmac_vcfg1); in __vxge_hw_vpath_mac_configure()
4267 val64 &= ~(VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_BD_MODE(0x3) | in __vxge_hw_vpath_mac_configure()
4272 val64 |= VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_BD_MODE( in __vxge_hw_vpath_mac_configure()
4277 writeq(val64, &vp_reg->rxmac_vcfg1); in __vxge_hw_vpath_mac_configure()
4290 u64 val64; in __vxge_hw_vpath_tim_configure() local
4309 val64 = readq(&vp_reg->tim_pci_cfg); in __vxge_hw_vpath_tim_configure()
4310 val64 |= VXGE_HW_TIM_PCI_CFG_ADD_PAD; in __vxge_hw_vpath_tim_configure()
4311 writeq(val64, &vp_reg->tim_pci_cfg); in __vxge_hw_vpath_tim_configure()
4315 val64 = readq(&vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); in __vxge_hw_vpath_tim_configure()
4318 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_BTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4320 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_BTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4324 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_BITMP_EN; in __vxge_hw_vpath_tim_configure()
4328 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_TIMER_AC; in __vxge_hw_vpath_tim_configure()
4330 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_TIMER_AC; in __vxge_hw_vpath_tim_configure()
4335 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI; in __vxge_hw_vpath_tim_configure()
4337 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI; in __vxge_hw_vpath_tim_configure()
4341 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_URNG_A(0x3f); in __vxge_hw_vpath_tim_configure()
4342 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_URNG_A( in __vxge_hw_vpath_tim_configure()
4347 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_URNG_B(0x3f); in __vxge_hw_vpath_tim_configure()
4348 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_URNG_B( in __vxge_hw_vpath_tim_configure()
4353 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_URNG_C(0x3f); in __vxge_hw_vpath_tim_configure()
4354 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_URNG_C( in __vxge_hw_vpath_tim_configure()
4358 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); in __vxge_hw_vpath_tim_configure()
4359 vpath->tim_tti_cfg1_saved = val64; in __vxge_hw_vpath_tim_configure()
4361 val64 = readq(&vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_TX]); in __vxge_hw_vpath_tim_configure()
4364 val64 &= ~VXGE_HW_TIM_CFG2_INT_NUM_UEC_A(0xffff); in __vxge_hw_vpath_tim_configure()
4365 val64 |= VXGE_HW_TIM_CFG2_INT_NUM_UEC_A( in __vxge_hw_vpath_tim_configure()
4370 val64 &= ~VXGE_HW_TIM_CFG2_INT_NUM_UEC_B(0xffff); in __vxge_hw_vpath_tim_configure()
4371 val64 |= VXGE_HW_TIM_CFG2_INT_NUM_UEC_B( in __vxge_hw_vpath_tim_configure()
4376 val64 &= ~VXGE_HW_TIM_CFG2_INT_NUM_UEC_C(0xffff); in __vxge_hw_vpath_tim_configure()
4377 val64 |= VXGE_HW_TIM_CFG2_INT_NUM_UEC_C( in __vxge_hw_vpath_tim_configure()
4382 val64 &= ~VXGE_HW_TIM_CFG2_INT_NUM_UEC_D(0xffff); in __vxge_hw_vpath_tim_configure()
4383 val64 |= VXGE_HW_TIM_CFG2_INT_NUM_UEC_D( in __vxge_hw_vpath_tim_configure()
4387 writeq(val64, &vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_TX]); in __vxge_hw_vpath_tim_configure()
4388 val64 = readq(&vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]); in __vxge_hw_vpath_tim_configure()
4392 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_TIMER_RI; in __vxge_hw_vpath_tim_configure()
4394 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_TIMER_RI; in __vxge_hw_vpath_tim_configure()
4398 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4400 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4405 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_UTIL_SEL(0x3f); in __vxge_hw_vpath_tim_configure()
4406 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_UTIL_SEL(vp_id); in __vxge_hw_vpath_tim_configure()
4410 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_LTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4412 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_LTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4416 writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]); in __vxge_hw_vpath_tim_configure()
4417 vpath->tim_tti_cfg3_saved = val64; in __vxge_hw_vpath_tim_configure()
4422 val64 = readq(&vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]); in __vxge_hw_vpath_tim_configure()
4425 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_BTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4427 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_BTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4431 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_BITMP_EN; in __vxge_hw_vpath_tim_configure()
4435 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_TIMER_AC; in __vxge_hw_vpath_tim_configure()
4437 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_TIMER_AC; in __vxge_hw_vpath_tim_configure()
4442 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI; in __vxge_hw_vpath_tim_configure()
4444 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI; in __vxge_hw_vpath_tim_configure()
4448 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_URNG_A(0x3f); in __vxge_hw_vpath_tim_configure()
4449 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_URNG_A( in __vxge_hw_vpath_tim_configure()
4454 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_URNG_B(0x3f); in __vxge_hw_vpath_tim_configure()
4455 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_URNG_B( in __vxge_hw_vpath_tim_configure()
4460 val64 &= ~VXGE_HW_TIM_CFG1_INT_NUM_URNG_C(0x3f); in __vxge_hw_vpath_tim_configure()
4461 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_URNG_C( in __vxge_hw_vpath_tim_configure()
4465 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]); in __vxge_hw_vpath_tim_configure()
4466 vpath->tim_rti_cfg1_saved = val64; in __vxge_hw_vpath_tim_configure()
4468 val64 = readq(&vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_RX]); in __vxge_hw_vpath_tim_configure()
4471 val64 &= ~VXGE_HW_TIM_CFG2_INT_NUM_UEC_A(0xffff); in __vxge_hw_vpath_tim_configure()
4472 val64 |= VXGE_HW_TIM_CFG2_INT_NUM_UEC_A( in __vxge_hw_vpath_tim_configure()
4477 val64 &= ~VXGE_HW_TIM_CFG2_INT_NUM_UEC_B(0xffff); in __vxge_hw_vpath_tim_configure()
4478 val64 |= VXGE_HW_TIM_CFG2_INT_NUM_UEC_B( in __vxge_hw_vpath_tim_configure()
4483 val64 &= ~VXGE_HW_TIM_CFG2_INT_NUM_UEC_C(0xffff); in __vxge_hw_vpath_tim_configure()
4484 val64 |= VXGE_HW_TIM_CFG2_INT_NUM_UEC_C( in __vxge_hw_vpath_tim_configure()
4489 val64 &= ~VXGE_HW_TIM_CFG2_INT_NUM_UEC_D(0xffff); in __vxge_hw_vpath_tim_configure()
4490 val64 |= VXGE_HW_TIM_CFG2_INT_NUM_UEC_D( in __vxge_hw_vpath_tim_configure()
4494 writeq(val64, &vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_RX]); in __vxge_hw_vpath_tim_configure()
4495 val64 = readq(&vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]); in __vxge_hw_vpath_tim_configure()
4499 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_TIMER_RI; in __vxge_hw_vpath_tim_configure()
4501 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_TIMER_RI; in __vxge_hw_vpath_tim_configure()
4505 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4507 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4512 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_UTIL_SEL(0x3f); in __vxge_hw_vpath_tim_configure()
4513 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_UTIL_SEL(vp_id); in __vxge_hw_vpath_tim_configure()
4517 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_LTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4519 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_LTIMER_VAL( in __vxge_hw_vpath_tim_configure()
4523 writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]); in __vxge_hw_vpath_tim_configure()
4524 vpath->tim_rti_cfg3_saved = val64; in __vxge_hw_vpath_tim_configure()
4527 val64 = 0; in __vxge_hw_vpath_tim_configure()
4528 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_EINTA]); in __vxge_hw_vpath_tim_configure()
4529 writeq(val64, &vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_EINTA]); in __vxge_hw_vpath_tim_configure()
4530 writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_EINTA]); in __vxge_hw_vpath_tim_configure()
4531 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_BMAP]); in __vxge_hw_vpath_tim_configure()
4532 writeq(val64, &vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_BMAP]); in __vxge_hw_vpath_tim_configure()
4533 writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_BMAP]); in __vxge_hw_vpath_tim_configure()
4535 val64 = VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_PRD(150); in __vxge_hw_vpath_tim_configure()
4536 val64 |= VXGE_HW_TIM_WRKLD_CLC_WRKLD_EVAL_DIV(0); in __vxge_hw_vpath_tim_configure()
4537 val64 |= VXGE_HW_TIM_WRKLD_CLC_CNT_RX_TX(3); in __vxge_hw_vpath_tim_configure()
4538 writeq(val64, &vp_reg->tim_wrkld_clc); in __vxge_hw_vpath_tim_configure()
4551 u64 val64; in __vxge_hw_vpath_initialize() local
4581 val64 = readq(&vp_reg->rtdma_rd_optimization_ctrl); in __vxge_hw_vpath_initialize()
4587 val64 &= in __vxge_hw_vpath_initialize()
4589 val64 |= in __vxge_hw_vpath_initialize()
4592 val64 |= VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_WAIT_FOR_SPACE; in __vxge_hw_vpath_initialize()
4595 val64 &= ~(VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY(7)); in __vxge_hw_vpath_initialize()
4596 val64 |= in __vxge_hw_vpath_initialize()
4600 val64 |= VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY_EN; in __vxge_hw_vpath_initialize()
4601 writeq(val64, &vp_reg->rtdma_rd_optimization_ctrl); in __vxge_hw_vpath_initialize()
4712 u64 val64; in vxge_hw_vpath_mtu_set() local
4727 val64 = readq(&vpath->vp_reg->rxmac_vcfg0); in vxge_hw_vpath_mtu_set()
4729 val64 &= ~VXGE_HW_RXMAC_VCFG0_RTS_MAX_FRM_LEN(0x3fff); in vxge_hw_vpath_mtu_set()
4730 val64 |= VXGE_HW_RXMAC_VCFG0_RTS_MAX_FRM_LEN(new_mtu); in vxge_hw_vpath_mtu_set()
4732 writeq(val64, &vpath->vp_reg->rxmac_vcfg0); in vxge_hw_vpath_mtu_set()
4915 u64 new_count, val64, val164; in vxge_hw_vpath_rx_doorbell_init() local
4930 val64 = readq(&vpath->vp_reg->prc_cfg6); in vxge_hw_vpath_rx_doorbell_init()
4931 val64 = VXGE_HW_PRC_CFG6_RXD_SPAT(val64); in vxge_hw_vpath_rx_doorbell_init()
4932 val64 &= 0x1ff; in vxge_hw_vpath_rx_doorbell_init()
4937 new_count -= (val64 + 1); in vxge_hw_vpath_rx_doorbell_init()
4938 val64 = min(val164, new_count) / 4; in vxge_hw_vpath_rx_doorbell_init()
4940 ring->rxds_limit = min(ring->rxds_limit, val64); in vxge_hw_vpath_rx_doorbell_init()
5105 u64 val64; in vxge_hw_vpath_enable() local
5109 val64 = VXGE_HW_CMN_RSTHDLR_CFG1_CLR_VPATH_RESET( in vxge_hw_vpath_enable()
5112 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), in vxge_hw_vpath_enable()