649 			      struct mlx4_cmd_mailbox *inbox)  in update_pkey_index()  argument
651 	u8 sched = *(u8 *)(inbox->buf + 64);  in update_pkey_index()
652 	u8 orig_index = *(u8 *)(inbox->buf + 35);  in update_pkey_index()
660 	*(u8 *)(inbox->buf + 35) = new_index;  in update_pkey_index()
663 static void update_gid(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *inbox,  in update_gid()  argument
666 	struct mlx4_qp_context	*qp_ctx = inbox->buf + 8;  in update_gid()
667 	enum mlx4_qp_optpar	optpar = be32_to_cpu(*(__be32 *) inbox->buf);  in update_gid()
704 				 struct mlx4_cmd_mailbox *inbox,  in update_vport_qp_param()  argument
707 	struct mlx4_qp_context	*qpc = inbox->buf + 8;  in update_vport_qp_param()
729 				*(__be32 *)inbox->buf =  in update_vport_qp_param()
730 					cpu_to_be32(be32_to_cpu(*(__be32 *)inbox->buf) |  in update_vport_qp_param()
2057 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_ALLOC_RES_wrapper()  argument
2369 			  struct mlx4_cmd_mailbox *inbox,  in mlx4_FREE_RES_wrapper()  argument
2515 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_SW2HW_MPT_wrapper()  argument
2523 	int mtt_base = mr_get_mtt_addr(inbox->buf) / dev->caps.mtt_entry_sz;  in mlx4_SW2HW_MPT_wrapper()
2535 	if (!mr_is_region(inbox->buf)) {  in mlx4_SW2HW_MPT_wrapper()
2541 	pd = mr_get_pd(inbox->buf);  in mlx4_SW2HW_MPT_wrapper()
2548 	if (mr_is_fmr(inbox->buf)) {  in mlx4_SW2HW_MPT_wrapper()
2550 		if (mr_is_bind_enabled(inbox->buf)) {  in mlx4_SW2HW_MPT_wrapper()
2555 		if (!mr_is_region(inbox->buf)) {  in mlx4_SW2HW_MPT_wrapper()
2561 	phys = mr_phys_mpt(inbox->buf);  in mlx4_SW2HW_MPT_wrapper()
2568 				      mr_get_mtt_size(inbox->buf), mtt);  in mlx4_SW2HW_MPT_wrapper()
2575 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_SW2HW_MPT_wrapper()
2598 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_HW2SW_MPT_wrapper()  argument
2612 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_HW2SW_MPT_wrapper()
2630 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_QUERY_MPT_wrapper()  argument
2666 		err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_QUERY_MPT_wrapper()
2708 			     struct mlx4_cmd_mailbox *inbox,  in mlx4_RST2INIT_QP_wrapper()  argument
2716 	struct mlx4_qp_context *qpc = inbox->buf + 8;  in mlx4_RST2INIT_QP_wrapper()
2767 	update_pkey_index(dev, slave, inbox);  in mlx4_RST2INIT_QP_wrapper()
2768 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_RST2INIT_QP_wrapper()
2842 			  struct mlx4_cmd_mailbox *inbox,  in mlx4_SW2HW_EQ_wrapper()  argument
2849 	struct mlx4_eq_context *eqc = inbox->buf;  in mlx4_SW2HW_EQ_wrapper()
2870 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_SW2HW_EQ_wrapper()
2891 			    struct mlx4_cmd_mailbox *inbox,  in mlx4_CONFIG_DEV_wrapper()  argument
2901 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_CONFIG_DEV_wrapper()
2932 				struct mlx4_cmd_mailbox *inbox,  in verify_qp_parameters()  argument
2942 	qp_ctx  = inbox->buf + 8;  in verify_qp_parameters()
2944 	optpar	= be32_to_cpu(*(__be32 *) inbox->buf);  in verify_qp_parameters()
3011 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_WRITE_MTT_wrapper()  argument
3016 	__be64 *page_list = inbox->buf;  in mlx4_WRITE_MTT_wrapper()
3049 			  struct mlx4_cmd_mailbox *inbox,  in mlx4_HW2SW_EQ_wrapper()  argument
3066 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_HW2SW_EQ_wrapper()
3155 			  struct mlx4_cmd_mailbox *inbox,  in mlx4_QUERY_EQ_wrapper()  argument
3173 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_QUERY_EQ_wrapper()
3182 			  struct mlx4_cmd_mailbox *inbox,  in mlx4_SW2HW_CQ_wrapper()  argument
3188 	struct mlx4_cq_context *cqc = inbox->buf;  in mlx4_SW2HW_CQ_wrapper()
3202 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_SW2HW_CQ_wrapper()
3220 			  struct mlx4_cmd_mailbox *inbox,  in mlx4_HW2SW_CQ_wrapper()  argument
3231 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_HW2SW_CQ_wrapper()
3245 			  struct mlx4_cmd_mailbox *inbox,  in mlx4_QUERY_CQ_wrapper()  argument
3260 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_QUERY_CQ_wrapper()
3269 			 struct mlx4_cmd_mailbox *inbox,  in handle_resize()  argument
3277 	struct mlx4_cq_context *cqc = inbox->buf;  in handle_resize()
3296 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in handle_resize()
3317 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_MODIFY_CQ_wrapper()  argument
3333 		err = handle_resize(dev, slave, vhcr, inbox, outbox, cmd, cq);  in mlx4_MODIFY_CQ_wrapper()
3337 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_MODIFY_CQ_wrapper()
3358 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_SW2HW_SRQ_wrapper()  argument
3366 	struct mlx4_srq_context *srqc = inbox->buf;  in mlx4_SW2HW_SRQ_wrapper()
3383 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_SW2HW_SRQ_wrapper()
3403 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_HW2SW_SRQ_wrapper()  argument
3414 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_HW2SW_SRQ_wrapper()
3432 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_QUERY_SRQ_wrapper()  argument
3447 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_QUERY_SRQ_wrapper()
3455 			 struct mlx4_cmd_mailbox *inbox,  in mlx4_ARM_SRQ_wrapper()  argument
3472 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_ARM_SRQ_wrapper()
3480 			struct mlx4_cmd_mailbox *inbox,  in mlx4_GEN_QP_wrapper()  argument
3496 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_GEN_QP_wrapper()
3504 			      struct mlx4_cmd_mailbox *inbox,  in mlx4_INIT2INIT_QP_wrapper()  argument
3508 	struct mlx4_qp_context *context = inbox->buf + 8;  in mlx4_INIT2INIT_QP_wrapper()
3510 	update_pkey_index(dev, slave, inbox);  in mlx4_INIT2INIT_QP_wrapper()
3511 	return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_INIT2INIT_QP_wrapper()
3516 				  struct mlx4_cmd_mailbox *inbox)  in adjust_qp_sched_queue()  argument
3518 	enum mlx4_qp_optpar optpar = be32_to_cpu(*(__be32 *)inbox->buf);  in adjust_qp_sched_queue()
3549 				struct mlx4_cmd_mailbox *inbox)  in roce_verify_mac()  argument
3554 	u8 sched = *(u8 *)(inbox->buf + 64);  in roce_verify_mac()
3568 			     struct mlx4_cmd_mailbox *inbox,  in mlx4_INIT2RTR_QP_wrapper()  argument
3573 	struct mlx4_qp_context *qpc = inbox->buf + 8;  in mlx4_INIT2RTR_QP_wrapper()
3584 	err = adjust_qp_sched_queue(dev, slave, qpc, inbox);  in mlx4_INIT2RTR_QP_wrapper()
3587 	err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_INIT2RTR, slave);  in mlx4_INIT2RTR_QP_wrapper()
3591 	if (roce_verify_mac(dev, slave, qpc, inbox))  in mlx4_INIT2RTR_QP_wrapper()
3594 	update_pkey_index(dev, slave, inbox);  in mlx4_INIT2RTR_QP_wrapper()
3595 	update_gid(dev, inbox, (u8)slave);  in mlx4_INIT2RTR_QP_wrapper()
3598 	err = update_vport_qp_param(dev, inbox, slave, qpn);  in mlx4_INIT2RTR_QP_wrapper()
3610 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_INIT2RTR_QP_wrapper()
3631 			    struct mlx4_cmd_mailbox *inbox,  in mlx4_RTR2RTS_QP_wrapper()  argument
3636 	struct mlx4_qp_context *context = inbox->buf + 8;  in mlx4_RTR2RTS_QP_wrapper()
3638 	err = adjust_qp_sched_queue(dev, slave, context, inbox);  in mlx4_RTR2RTS_QP_wrapper()
3641 	err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_RTR2RTS, slave);  in mlx4_RTR2RTS_QP_wrapper()
3645 	update_pkey_index(dev, slave, inbox);  in mlx4_RTR2RTS_QP_wrapper()
3646 	update_gid(dev, inbox, (u8)slave);  in mlx4_RTR2RTS_QP_wrapper()
3648 	return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_RTR2RTS_QP_wrapper()
3653 			    struct mlx4_cmd_mailbox *inbox,  in mlx4_RTS2RTS_QP_wrapper()  argument
3658 	struct mlx4_qp_context *context = inbox->buf + 8;  in mlx4_RTS2RTS_QP_wrapper()
3660 	err = adjust_qp_sched_queue(dev, slave, context, inbox);  in mlx4_RTS2RTS_QP_wrapper()
3663 	err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_RTS2RTS, slave);  in mlx4_RTS2RTS_QP_wrapper()
3667 	update_pkey_index(dev, slave, inbox);  in mlx4_RTS2RTS_QP_wrapper()
3668 	update_gid(dev, inbox, (u8)slave);  in mlx4_RTS2RTS_QP_wrapper()
3670 	return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_RTS2RTS_QP_wrapper()
3676 			      struct mlx4_cmd_mailbox *inbox,  in mlx4_SQERR2RTS_QP_wrapper()  argument
3680 	struct mlx4_qp_context *context = inbox->buf + 8;  in mlx4_SQERR2RTS_QP_wrapper()
3681 	int err = adjust_qp_sched_queue(dev, slave, context, inbox);  in mlx4_SQERR2RTS_QP_wrapper()
3685 	return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_SQERR2RTS_QP_wrapper()
3690 			    struct mlx4_cmd_mailbox *inbox,  in mlx4_SQD2SQD_QP_wrapper()  argument
3695 	struct mlx4_qp_context *context = inbox->buf + 8;  in mlx4_SQD2SQD_QP_wrapper()
3697 	err = adjust_qp_sched_queue(dev, slave, context, inbox);  in mlx4_SQD2SQD_QP_wrapper()
3700 	err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_SQD2SQD, slave);  in mlx4_SQD2SQD_QP_wrapper()
3705 	update_gid(dev, inbox, (u8)slave);  in mlx4_SQD2SQD_QP_wrapper()
3706 	update_pkey_index(dev, slave, inbox);  in mlx4_SQD2SQD_QP_wrapper()
3707 	return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_SQD2SQD_QP_wrapper()
3712 			    struct mlx4_cmd_mailbox *inbox,  in mlx4_SQD2RTS_QP_wrapper()  argument
3717 	struct mlx4_qp_context *context = inbox->buf + 8;  in mlx4_SQD2RTS_QP_wrapper()
3719 	err = adjust_qp_sched_queue(dev, slave, context, inbox);  in mlx4_SQD2RTS_QP_wrapper()
3722 	err = verify_qp_parameters(dev, vhcr, inbox, QP_TRANS_SQD2RTS, slave);  in mlx4_SQD2RTS_QP_wrapper()
3727 	update_gid(dev, inbox, (u8)slave);  in mlx4_SQD2RTS_QP_wrapper()
3728 	update_pkey_index(dev, slave, inbox);  in mlx4_SQD2RTS_QP_wrapper()
3729 	return mlx4_GEN_QP_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_SQD2RTS_QP_wrapper()
3734 			 struct mlx4_cmd_mailbox *inbox,  in mlx4_2RST_QP_wrapper()  argument
3745 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_2RST_QP_wrapper()
3887 			       struct mlx4_cmd_mailbox *inbox,  in mlx4_QP_ATTACH_wrapper()  argument
3892 	u8 *gid = inbox->buf;  in mlx4_QP_ATTACH_wrapper()
3973 			  struct mlx4_cmd_mailbox *inbox,  in add_eth_header()  argument
3985 	ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf;  in add_eth_header()
4031 			   struct mlx4_cmd_mailbox *inbox,  in mlx4_UPDATE_QP_wrapper()  argument
4044 	cmd = (struct mlx4_update_qp_context *)inbox->buf;  in mlx4_UPDATE_QP_wrapper()
4072 	err = mlx4_cmd(dev, inbox->dma,  in mlx4_UPDATE_QP_wrapper()
4088 					 struct mlx4_cmd_mailbox *inbox,  in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()  argument
4107 	ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf;  in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4133 		if (add_eth_header(dev, slave, inbox, rlist, header_id)) {  in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4146 	err = mlx4_cmd_imm(dev, inbox->dma, &vhcr->out_param,  in mlx4_QP_FLOW_STEERING_ATTACH_wrapper()
4170 					 struct mlx4_cmd_mailbox *inbox,  in mlx4_QP_FLOW_STEERING_DETACH_wrapper()  argument
4213 			       struct mlx4_cmd_mailbox *inbox,  in mlx4_QUERY_IF_STAT_wrapper()  argument
4224 	err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);  in mlx4_QUERY_IF_STAT_wrapper()