Lines Matching refs:num_ports

177 		for (i = 0; i < dev->caps.num_ports - 1; i++) {  in mlx4_check_port_params()
185 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_check_port_params()
199 for (i = 1; i <= dev->caps.num_ports; ++i) in mlx4_set_port_mask()
337 if (dev_cap->num_ports > MLX4_MAX_PORTS) { in mlx4_dev_cap()
339 dev_cap->num_ports, MLX4_MAX_PORTS); in mlx4_dev_cap()
351 dev->caps.num_ports = dev_cap->num_ports; in mlx4_dev_cap()
356 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_dev_cap()
423 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_dev_cap()
489 dev->caps.num_ports; in mlx4_dev_cap()
820 dev->caps.num_ports = func_cap.num_ports; in mlx4_slave_cap()
837 if (dev->caps.num_ports > MLX4_MAX_PORTS) { in mlx4_slave_cap()
839 dev->caps.num_ports, MLX4_MAX_PORTS); in mlx4_slave_cap()
843 dev->caps.qp0_qkey = kcalloc(dev->caps.num_ports, sizeof(u32), GFP_KERNEL); in mlx4_slave_cap()
844 dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); in mlx4_slave_cap()
845 dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); in mlx4_slave_cap()
846 dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); in mlx4_slave_cap()
847 dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); in mlx4_slave_cap()
856 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_slave_cap()
952 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_request_modules()
976 for (port = 0; port < dev->caps.num_ports; port++) { in mlx4_change_port_types()
984 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_change_port_types()
1060 for (i = 0; i < mdev->caps.num_ports; i++) { in set_port_type()
1069 for (i = 1; i <= mdev->caps.num_ports; i++) { in set_port_type()
1090 for (i = 0; i < mdev->caps.num_ports; i++) in set_port_type()
1181 for (port = 1; port <= mdev->caps.num_ports; port++) { in set_port_ib_mtu()
1823 for (i = 1; i <= dev->caps.num_ports; i++) { in mlx4_parav_master_pf_caps()
1946 for (i = 1; i <= dev->caps.num_ports; i++) { in mlx4_validate_optimized_steering()
2405 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_setup_hca()
2491 int nreq = dev->caps.num_ports * num_online_cpus() + MSIX_LEGACY_SZ; in mlx4_enable_msi_x()
2510 dev->caps.num_ports * MIN_MSIX_P_PORT) { in mlx4_enable_msi_x()
2602 int num_entries = dev->caps.num_ports; in mlx4_init_steering()
2622 int num_entries = dev->caps.num_ports; in mlx4_clear_steering()
3003 if (dev->caps.num_ports < 2 && in mlx4_load_one()
3008 dev->caps.num_ports); in mlx4_load_one()
3021 dev->caps.num_ports; in mlx4_load_one()
3082 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_load_one()
3390 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_unload_one()
3401 for (p = 1; p <= dev->caps.num_ports; p++) { in mlx4_unload_one()
3507 for (i = 0; i < dev->caps.num_ports; i++) in restore_current_port_types()