Lines Matching refs:opcode

529 	vhcr->opcode = cpu_to_be16((((u16) op_modifier) << 12) | (op & 0xfff));  in mlx4_slave_cmd()
1047 .opcode = MLX4_CMD_QUERY_FW,
1056 .opcode = MLX4_CMD_QUERY_HCA,
1065 .opcode = MLX4_CMD_QUERY_DEV_CAP,
1074 .opcode = MLX4_CMD_QUERY_FUNC_CAP,
1083 .opcode = MLX4_CMD_QUERY_ADAPTER,
1092 .opcode = MLX4_CMD_INIT_PORT,
1101 .opcode = MLX4_CMD_CLOSE_PORT,
1110 .opcode = MLX4_CMD_QUERY_PORT,
1119 .opcode = MLX4_CMD_SET_PORT,
1128 .opcode = MLX4_CMD_MAP_EQ,
1137 .opcode = MLX4_CMD_SW2HW_EQ,
1146 .opcode = MLX4_CMD_HW_HEALTH_CHECK,
1155 .opcode = MLX4_CMD_NOP,
1164 .opcode = MLX4_CMD_CONFIG_DEV,
1173 .opcode = MLX4_CMD_ALLOC_RES,
1182 .opcode = MLX4_CMD_FREE_RES,
1191 .opcode = MLX4_CMD_SW2HW_MPT,
1200 .opcode = MLX4_CMD_QUERY_MPT,
1209 .opcode = MLX4_CMD_HW2SW_MPT,
1218 .opcode = MLX4_CMD_READ_MTT,
1227 .opcode = MLX4_CMD_WRITE_MTT,
1236 .opcode = MLX4_CMD_SYNC_TPT,
1245 .opcode = MLX4_CMD_HW2SW_EQ,
1254 .opcode = MLX4_CMD_QUERY_EQ,
1263 .opcode = MLX4_CMD_SW2HW_CQ,
1272 .opcode = MLX4_CMD_HW2SW_CQ,
1281 .opcode = MLX4_CMD_QUERY_CQ,
1290 .opcode = MLX4_CMD_MODIFY_CQ,
1299 .opcode = MLX4_CMD_SW2HW_SRQ,
1308 .opcode = MLX4_CMD_HW2SW_SRQ,
1317 .opcode = MLX4_CMD_QUERY_SRQ,
1326 .opcode = MLX4_CMD_ARM_SRQ,
1335 .opcode = MLX4_CMD_RST2INIT_QP,
1344 .opcode = MLX4_CMD_INIT2INIT_QP,
1353 .opcode = MLX4_CMD_INIT2RTR_QP,
1362 .opcode = MLX4_CMD_RTR2RTS_QP,
1371 .opcode = MLX4_CMD_RTS2RTS_QP,
1380 .opcode = MLX4_CMD_SQERR2RTS_QP,
1389 .opcode = MLX4_CMD_2ERR_QP,
1398 .opcode = MLX4_CMD_RTS2SQD_QP,
1407 .opcode = MLX4_CMD_SQD2SQD_QP,
1416 .opcode = MLX4_CMD_SQD2RTS_QP,
1425 .opcode = MLX4_CMD_2RST_QP,
1434 .opcode = MLX4_CMD_QUERY_QP,
1443 .opcode = MLX4_CMD_SUSPEND_QP,
1452 .opcode = MLX4_CMD_UNSUSPEND_QP,
1461 .opcode = MLX4_CMD_UPDATE_QP,
1470 .opcode = MLX4_CMD_GET_OP_REQ,
1479 .opcode = MLX4_CMD_ALLOCATE_VPP,
1488 .opcode = MLX4_CMD_SET_VPORT_QOS,
1497 .opcode = MLX4_CMD_CONF_SPECIAL_QP,
1506 .opcode = MLX4_CMD_MAD_IFC,
1515 .opcode = MLX4_CMD_MAD_DEMUX,
1524 .opcode = MLX4_CMD_QUERY_IF_STAT,
1533 .opcode = MLX4_CMD_ACCESS_REG,
1542 .opcode = MLX4_CMD_CONGESTION_CTRL_OPCODE,
1552 .opcode = MLX4_CMD_QP_ATTACH,
1561 .opcode = MLX4_CMD_PROMISC,
1571 .opcode = MLX4_CMD_SET_VLAN_FLTR,
1580 .opcode = MLX4_CMD_SET_MCAST_FLTR,
1589 .opcode = MLX4_CMD_DUMP_ETH_STATS,
1598 .opcode = MLX4_CMD_INFORM_FLR_DONE,
1608 .opcode = MLX4_QP_FLOW_STEERING_ATTACH,
1617 .opcode = MLX4_QP_FLOW_STEERING_DETACH,
1626 .opcode = MLX4_FLOW_STEERING_IB_UC_QP_RANGE,
1635 .opcode = MLX4_CMD_VIRT_PORT_MAP,
1686 vhcr->op = be16_to_cpu(vhcr_cmd->opcode) & 0xfff; in mlx4_master_process_vhcr()
1687 vhcr->op_modifier = (u8) (be16_to_cpu(vhcr_cmd->opcode) >> 12); in mlx4_master_process_vhcr()
1692 if (vhcr->op == cmd_info[i].opcode) { in mlx4_master_process_vhcr()
1721 __func__, cmd->opcode); in mlx4_master_process_vhcr()