Lines Matching refs:hw
44 static s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw);
45 static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw);
46 static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw);
47 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw);
49 enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw) in ixgbe_get_media_type_X540() argument
54 s32 ixgbe_get_invariants_X540(struct ixgbe_hw *hw) in ixgbe_get_invariants_X540() argument
56 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_X540()
64 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw); in ixgbe_get_invariants_X540()
75 s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed, in ixgbe_setup_mac_link_X540() argument
78 return hw->phy.ops.setup_link_speed(hw, speed, in ixgbe_setup_mac_link_X540()
90 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) in ixgbe_reset_hw_X540() argument
96 status = hw->mac.ops.stop_adapter(hw); in ixgbe_reset_hw_X540()
101 ixgbe_clear_tx_pending(hw); in ixgbe_reset_hw_X540()
105 ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_X540()
106 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_X540()
107 IXGBE_WRITE_FLUSH(hw); in ixgbe_reset_hw_X540()
112 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_X540()
119 hw_dbg(hw, "Reset polling failed to complete.\n"); in ixgbe_reset_hw_X540()
128 if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { in ixgbe_reset_hw_X540()
129 hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_reset_hw_X540()
134 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT); in ixgbe_reset_hw_X540()
137 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_X540()
144 hw->mac.num_rar_entries = IXGBE_X540_MAX_TX_QUEUES; in ixgbe_reset_hw_X540()
145 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_X540()
148 hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr); in ixgbe_reset_hw_X540()
151 if (is_valid_ether_addr(hw->mac.san_addr)) { in ixgbe_reset_hw_X540()
152 hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1, in ixgbe_reset_hw_X540()
153 hw->mac.san_addr, 0, IXGBE_RAH_AV); in ixgbe_reset_hw_X540()
156 hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1; in ixgbe_reset_hw_X540()
159 hw->mac.num_rar_entries--; in ixgbe_reset_hw_X540()
163 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, in ixgbe_reset_hw_X540()
164 &hw->mac.wwpn_prefix); in ixgbe_reset_hw_X540()
177 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw) in ixgbe_start_hw_X540() argument
181 ret_val = ixgbe_start_hw_generic(hw); in ixgbe_start_hw_X540()
185 return ixgbe_start_hw_gen2(hw); in ixgbe_start_hw_X540()
195 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) in ixgbe_init_eeprom_params_X540() argument
197 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_X540()
205 eec = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_init_eeprom_params_X540()
211 hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", in ixgbe_init_eeprom_params_X540()
226 static s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) in ixgbe_read_eerd_X540() argument
230 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_read_eerd_X540()
233 status = ixgbe_read_eerd_generic(hw, offset, data); in ixgbe_read_eerd_X540()
235 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_read_eerd_X540()
248 static s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, in ixgbe_read_eerd_buffer_X540() argument
253 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_read_eerd_buffer_X540()
256 status = ixgbe_read_eerd_buffer_generic(hw, offset, words, data); in ixgbe_read_eerd_buffer_X540()
258 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_read_eerd_buffer_X540()
270 static s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data) in ixgbe_write_eewr_X540() argument
274 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_write_eewr_X540()
277 status = ixgbe_write_eewr_generic(hw, offset, data); in ixgbe_write_eewr_X540()
279 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_write_eewr_X540()
292 static s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, in ixgbe_write_eewr_buffer_X540() argument
297 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_write_eewr_buffer_X540()
300 status = ixgbe_write_eewr_buffer_generic(hw, offset, words, data); in ixgbe_write_eewr_buffer_X540()
302 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_write_eewr_buffer_X540()
314 static s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw) in ixgbe_calc_eeprom_checksum_X540() argument
333 if (ixgbe_read_eerd_generic(hw, i, &word)) { in ixgbe_calc_eeprom_checksum_X540()
334 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_X540()
348 if (ixgbe_read_eerd_generic(hw, i, &pointer)) { in ixgbe_calc_eeprom_checksum_X540()
349 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_X540()
355 pointer >= hw->eeprom.word_size) in ixgbe_calc_eeprom_checksum_X540()
358 if (ixgbe_read_eerd_generic(hw, pointer, &length)) { in ixgbe_calc_eeprom_checksum_X540()
359 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_X540()
366 (pointer + length) >= hw->eeprom.word_size) in ixgbe_calc_eeprom_checksum_X540()
370 if (ixgbe_read_eerd_generic(hw, j, &word)) { in ixgbe_calc_eeprom_checksum_X540()
371 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_X540()
391 static s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, in ixgbe_validate_eeprom_checksum_X540() argument
402 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_validate_eeprom_checksum_X540()
404 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_validate_eeprom_checksum_X540()
408 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_validate_eeprom_checksum_X540()
411 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_validate_eeprom_checksum_X540()
420 status = ixgbe_read_eerd_generic(hw, IXGBE_EEPROM_CHECKSUM, in ixgbe_validate_eeprom_checksum_X540()
429 hw_dbg(hw, "Invalid EEPROM checksum"); in ixgbe_validate_eeprom_checksum_X540()
438 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_validate_eeprom_checksum_X540()
451 static s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw) in ixgbe_update_eeprom_checksum_X540() argument
460 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_update_eeprom_checksum_X540()
462 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_update_eeprom_checksum_X540()
466 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_update_eeprom_checksum_X540()
469 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_update_eeprom_checksum_X540()
478 status = ixgbe_write_eewr_generic(hw, IXGBE_EEPROM_CHECKSUM, checksum); in ixgbe_update_eeprom_checksum_X540()
482 status = ixgbe_update_flash_X540(hw); in ixgbe_update_eeprom_checksum_X540()
485 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_update_eeprom_checksum_X540()
496 static s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw) in ixgbe_update_flash_X540() argument
501 status = ixgbe_poll_flash_update_done_X540(hw); in ixgbe_update_flash_X540()
503 hw_dbg(hw, "Flash update time out\n"); in ixgbe_update_flash_X540()
507 flup = IXGBE_READ_REG(hw, IXGBE_EEC) | IXGBE_EEC_FLUP; in ixgbe_update_flash_X540()
508 IXGBE_WRITE_REG(hw, IXGBE_EEC, flup); in ixgbe_update_flash_X540()
510 status = ixgbe_poll_flash_update_done_X540(hw); in ixgbe_update_flash_X540()
512 hw_dbg(hw, "Flash update complete\n"); in ixgbe_update_flash_X540()
514 hw_dbg(hw, "Flash update time out\n"); in ixgbe_update_flash_X540()
516 if (hw->revision_id == 0) { in ixgbe_update_flash_X540()
517 flup = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_update_flash_X540()
521 IXGBE_WRITE_REG(hw, IXGBE_EEC, flup); in ixgbe_update_flash_X540()
524 status = ixgbe_poll_flash_update_done_X540(hw); in ixgbe_update_flash_X540()
526 hw_dbg(hw, "Flash update complete\n"); in ixgbe_update_flash_X540()
528 hw_dbg(hw, "Flash update time out\n"); in ixgbe_update_flash_X540()
541 static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw) in ixgbe_poll_flash_update_done_X540() argument
547 reg = IXGBE_READ_REG(hw, IXGBE_EEC); in ixgbe_poll_flash_update_done_X540()
563 s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) in ixgbe_acquire_swfw_sync_X540() argument
580 if (ixgbe_get_swfw_sync_semaphore(hw)) in ixgbe_acquire_swfw_sync_X540()
583 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); in ixgbe_acquire_swfw_sync_X540()
586 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swfw_sync); in ixgbe_acquire_swfw_sync_X540()
587 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_acquire_swfw_sync_X540()
596 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_acquire_swfw_sync_X540()
608 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); in ixgbe_acquire_swfw_sync_X540()
610 if (ixgbe_get_swfw_sync_semaphore(hw)) in ixgbe_acquire_swfw_sync_X540()
614 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swfw_sync); in ixgbe_acquire_swfw_sync_X540()
615 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_acquire_swfw_sync_X540()
631 void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) in ixgbe_release_swfw_sync_X540() argument
636 ixgbe_get_swfw_sync_semaphore(hw); in ixgbe_release_swfw_sync_X540()
638 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); in ixgbe_release_swfw_sync_X540()
640 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swfw_sync); in ixgbe_release_swfw_sync_X540()
642 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_release_swfw_sync_X540()
652 static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw) in ixgbe_get_swfw_sync_semaphore() argument
663 swsm = IXGBE_READ_REG(hw, IXGBE_SWSM); in ixgbe_get_swfw_sync_semaphore()
670 hw_dbg(hw, in ixgbe_get_swfw_sync_semaphore()
677 swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); in ixgbe_get_swfw_sync_semaphore()
693 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw) in ixgbe_release_swfw_sync_semaphore() argument
699 swsm = IXGBE_READ_REG(hw, IXGBE_SWSM); in ixgbe_release_swfw_sync_semaphore()
701 IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm); in ixgbe_release_swfw_sync_semaphore()
703 swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC); in ixgbe_release_swfw_sync_semaphore()
705 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swsm); in ixgbe_release_swfw_sync_semaphore()
707 IXGBE_WRITE_FLUSH(hw); in ixgbe_release_swfw_sync_semaphore()
718 s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index) in ixgbe_blink_led_start_X540() argument
730 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_blink_led_start_X540()
732 macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC); in ixgbe_blink_led_start_X540()
734 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); in ixgbe_blink_led_start_X540()
737 ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); in ixgbe_blink_led_start_X540()
740 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); in ixgbe_blink_led_start_X540()
741 IXGBE_WRITE_FLUSH(hw); in ixgbe_blink_led_start_X540()
754 s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index) in ixgbe_blink_led_stop_X540() argument
760 ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); in ixgbe_blink_led_stop_X540()
764 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); in ixgbe_blink_led_stop_X540()
767 macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC); in ixgbe_blink_led_stop_X540()
769 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); in ixgbe_blink_led_stop_X540()
770 IXGBE_WRITE_FLUSH(hw); in ixgbe_blink_led_stop_X540()