255 static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)  in ixgbe_check_for_msg_pf()  argument
257 	s32 index = IXGBE_MBVFICR_INDEX(vf_number);  in ixgbe_check_for_msg_pf()
258 	u32 vf_bit = vf_number % 16;  in ixgbe_check_for_msg_pf()
276 static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)  in ixgbe_check_for_ack_pf()  argument
278 	s32 index = IXGBE_MBVFICR_INDEX(vf_number);  in ixgbe_check_for_ack_pf()
279 	u32 vf_bit = vf_number % 16;  in ixgbe_check_for_ack_pf()
297 static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)  in ixgbe_check_for_rst_pf()  argument
299 	u32 reg_offset = (vf_number < 32) ? 0 : 1;  in ixgbe_check_for_rst_pf()
300 	u32 vf_shift = vf_number % 32;  in ixgbe_check_for_rst_pf()
332 static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)  in ixgbe_obtain_mbx_lock_pf()  argument
337 	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU);  in ixgbe_obtain_mbx_lock_pf()
340 	p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number));  in ixgbe_obtain_mbx_lock_pf()
357 			      u16 vf_number)  in ixgbe_write_mbx_pf()  argument
363 	ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);  in ixgbe_write_mbx_pf()
368 	ixgbe_check_for_msg_pf(hw, vf_number);  in ixgbe_write_mbx_pf()
369 	ixgbe_check_for_ack_pf(hw, vf_number);  in ixgbe_write_mbx_pf()
373 		IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]);  in ixgbe_write_mbx_pf()
376 	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS);  in ixgbe_write_mbx_pf()
396 			     u16 vf_number)  in ixgbe_read_mbx_pf()  argument
402 	ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);  in ixgbe_read_mbx_pf()
408 		msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i);  in ixgbe_read_mbx_pf()
411 	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK);  in ixgbe_read_mbx_pf()