47 static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)  in ixgbe_fcoe_clear_ddp()  argument
49 	ddp->len = 0;  in ixgbe_fcoe_clear_ddp()
50 	ddp->err = 1;  in ixgbe_fcoe_clear_ddp()
51 	ddp->udl = NULL;  in ixgbe_fcoe_clear_ddp()
52 	ddp->udp = 0UL;  in ixgbe_fcoe_clear_ddp()
53 	ddp->sgl = NULL;  in ixgbe_fcoe_clear_ddp()
54 	ddp->sgc = 0;  in ixgbe_fcoe_clear_ddp()
73 	struct ixgbe_fcoe_ddp *ddp;  in ixgbe_fcoe_ddp_put()  local
85 	ddp = &fcoe->ddp[xid];  in ixgbe_fcoe_ddp_put()
86 	if (!ddp->udl)  in ixgbe_fcoe_ddp_put()
90 	len = ddp->len;  in ixgbe_fcoe_ddp_put()
92 	if (!ddp->err)  in ixgbe_fcoe_ddp_put()
134 	if (ddp->sgl)  in ixgbe_fcoe_ddp_put()
135 		dma_unmap_sg(&adapter->pdev->dev, ddp->sgl, ddp->sgc,  in ixgbe_fcoe_ddp_put()
137 	if (ddp->pool) {  in ixgbe_fcoe_ddp_put()
138 		dma_pool_free(ddp->pool, ddp->udl, ddp->udp);  in ixgbe_fcoe_ddp_put()
139 		ddp->pool = NULL;  in ixgbe_fcoe_ddp_put()
142 	ixgbe_fcoe_clear_ddp(ddp);  in ixgbe_fcoe_ddp_put()
163 	struct ixgbe_fcoe_ddp *ddp;  in ixgbe_fcoe_ddp_setup()  local
191 	ddp = &fcoe->ddp[xid];  in ixgbe_fcoe_ddp_setup()
192 	if (ddp->sgl) {  in ixgbe_fcoe_ddp_setup()
194 		      xid, ddp->sgl, ddp->sgc);  in ixgbe_fcoe_ddp_setup()
197 	ixgbe_fcoe_clear_ddp(ddp);  in ixgbe_fcoe_ddp_setup()
219 	ddp->udl = dma_pool_alloc(ddp_pool->pool, GFP_ATOMIC, &ddp->udp);  in ixgbe_fcoe_ddp_setup()
220 	if (!ddp->udl) {  in ixgbe_fcoe_ddp_setup()
224 	ddp->pool = ddp_pool->pool;  in ixgbe_fcoe_ddp_setup()
225 	ddp->sgl = sgl;  in ixgbe_fcoe_ddp_setup()
226 	ddp->sgc = sgc;  in ixgbe_fcoe_ddp_setup()
257 			ddp->udl[j] = (u64)(addr - thisoff);  in ixgbe_fcoe_ddp_setup()
279 		ddp->udl[j] = (u64)(fcoe->extra_ddp_buffer_dma);  in ixgbe_fcoe_ddp_setup()
316 				ddp->udp & DMA_BIT_MASK(32));  in ixgbe_fcoe_ddp_setup()
317 		IXGBE_WRITE_REG(hw, IXGBE_FCDDC(1, xid), (u64)ddp->udp >> 32);  in ixgbe_fcoe_ddp_setup()
328 		IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));  in ixgbe_fcoe_ddp_setup()
329 		IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);  in ixgbe_fcoe_ddp_setup()
343 	dma_pool_free(ddp->pool, ddp->udl, ddp->udp);  in ixgbe_fcoe_ddp_setup()
344 	ixgbe_fcoe_clear_ddp(ddp);  in ixgbe_fcoe_ddp_setup()
412 	struct ixgbe_fcoe_ddp *ddp;  in ixgbe_fcoe_ddp()  local
447 	ddp = &fcoe->ddp[xid];  in ixgbe_fcoe_ddp()
448 	if (!ddp->udl)  in ixgbe_fcoe_ddp()
460 		ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);  in ixgbe_fcoe_ddp()
465 		dma_unmap_sg(&adapter->pdev->dev, ddp->sgl,  in ixgbe_fcoe_ddp()
466 			     ddp->sgc, DMA_FROM_DEVICE);  in ixgbe_fcoe_ddp()
467 		ddp->err = ddp_err;  in ixgbe_fcoe_ddp()
468 		ddp->sgl = NULL;  in ixgbe_fcoe_ddp()
469 		ddp->sgc = 0;  in ixgbe_fcoe_ddp()
474 		ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);  in ixgbe_fcoe_ddp()
475 		if (ddp->len)  in ixgbe_fcoe_ddp()
476 			rc = ddp->len;  in ixgbe_fcoe_ddp()