43 static u32 ixgb_hash_mc_addr(struct ixgb_hw *hw, u8 * mc_addr);
45 static void ixgb_mta_set(struct ixgb_hw *hw, u32 hash_value);
47 static void ixgb_get_bus_info(struct ixgb_hw *hw);
49 static bool ixgb_link_reset(struct ixgb_hw *hw);
51 static void ixgb_optics_reset(struct ixgb_hw *hw);
53 static void ixgb_optics_reset_bcm(struct ixgb_hw *hw);
55 static ixgb_phy_type ixgb_identify_phy(struct ixgb_hw *hw);
57 static void ixgb_clear_hw_cntrs(struct ixgb_hw *hw);
59 static void ixgb_clear_vfta(struct ixgb_hw *hw);
61 static void ixgb_init_rx_addrs(struct ixgb_hw *hw);
63 static u16 ixgb_read_phy_reg(struct ixgb_hw *hw,
68 static bool ixgb_setup_fc(struct ixgb_hw *hw);
72 static u32 ixgb_mac_reset(struct ixgb_hw *hw)  in ixgb_mac_reset()  argument
87 	IXGB_WRITE_REG_IO(hw, CTRL0, ctrl_reg);  in ixgb_mac_reset()
89 	IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);  in ixgb_mac_reset()
94 	ctrl_reg = IXGB_READ_REG(hw, CTRL0);  in ixgb_mac_reset()
100 	if (hw->subsystem_vendor_id == PCI_VENDOR_ID_SUN) {  in ixgb_mac_reset()
107 		IXGB_WRITE_REG(hw, CTRL1, ctrl_reg);  in ixgb_mac_reset()
108 		ixgb_optics_reset_bcm(hw);  in ixgb_mac_reset()
111 	if (hw->phy_type == ixgb_phy_type_txn17401)  in ixgb_mac_reset()
112 		ixgb_optics_reset(hw);  in ixgb_mac_reset()
123 ixgb_adapter_stop(struct ixgb_hw *hw)  in ixgb_adapter_stop()  argument
133 	if (hw->adapter_stopped) {  in ixgb_adapter_stop()
141 	hw->adapter_stopped = true;  in ixgb_adapter_stop()
145 	IXGB_WRITE_REG(hw, IMC, 0xFFFFFFFF);  in ixgb_adapter_stop()
151 	IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN);  in ixgb_adapter_stop()
152 	IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN);  in ixgb_adapter_stop()
153 	IXGB_WRITE_FLUSH(hw);  in ixgb_adapter_stop()
163 	ctrl_reg = ixgb_mac_reset(hw);  in ixgb_adapter_stop()
167 	IXGB_WRITE_REG(hw, IMC, 0xffffffff);  in ixgb_adapter_stop()
170 	icr_reg = IXGB_READ_REG(hw, ICR);  in ixgb_adapter_stop()
186 ixgb_identify_xpak_vendor(struct ixgb_hw *hw)  in ixgb_identify_xpak_vendor()  argument
198 		vendor_name[i] = ixgb_read_phy_reg(hw,  in ixgb_identify_xpak_vendor()
226 ixgb_identify_phy(struct ixgb_hw *hw)  in ixgb_identify_phy()  argument
234 	switch (hw->device_id) {  in ixgb_identify_phy()
244 		xpak_vendor = ixgb_identify_xpak_vendor(hw);  in ixgb_identify_phy()
259 		xpak_vendor = ixgb_identify_xpak_vendor(hw);  in ixgb_identify_phy()
275 	if (hw->subsystem_vendor_id == PCI_VENDOR_ID_SUN)  in ixgb_identify_phy()
299 ixgb_init_hw(struct ixgb_hw *hw)  in ixgb_init_hw()  argument
314 	ctrl_reg = ixgb_mac_reset(hw);  in ixgb_init_hw()
319 	IXGB_WRITE_REG_IO(hw, CTRL1, IXGB_CTRL1_EE_RST);  in ixgb_init_hw()
321 	IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST);  in ixgb_init_hw()
327 	if (!ixgb_get_eeprom_data(hw))  in ixgb_init_hw()
331 	hw->device_id = ixgb_get_ee_device_id(hw);  in ixgb_init_hw()
332 	hw->phy_type = ixgb_identify_phy(hw);  in ixgb_init_hw()
337 	ixgb_init_rx_addrs(hw);  in ixgb_init_hw()
343 	if (!mac_addr_valid(hw->curr_mac_addr)) {  in ixgb_init_hw()
349 	hw->adapter_stopped = false;  in ixgb_init_hw()
352 	ixgb_get_bus_info(hw);  in ixgb_init_hw()
357 		IXGB_WRITE_REG_ARRAY(hw, MTA, i, 0);  in ixgb_init_hw()
360 	ixgb_clear_vfta(hw);  in ixgb_init_hw()
363 	ixgb_clear_hw_cntrs(hw);  in ixgb_init_hw()
366 	status = ixgb_setup_fc(hw);  in ixgb_init_hw()
369 	ixgb_check_for_link(hw);  in ixgb_init_hw()
384 ixgb_init_rx_addrs(struct ixgb_hw *hw)  in ixgb_init_rx_addrs()  argument
395 	if (!mac_addr_valid(hw->curr_mac_addr)) {  in ixgb_init_rx_addrs()
398 		ixgb_get_ee_mac_addr(hw, hw->curr_mac_addr);  in ixgb_init_rx_addrs()
401 			 hw->curr_mac_addr);  in ixgb_init_rx_addrs()
406 		pr_debug("New MAC Addr = %pM\n", hw->curr_mac_addr);  in ixgb_init_rx_addrs()
408 		ixgb_rar_set(hw, hw->curr_mac_addr, 0);  in ixgb_init_rx_addrs()
415 		IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);  in ixgb_init_rx_addrs()
416 		IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);  in ixgb_init_rx_addrs()
434 ixgb_mc_addr_list_update(struct ixgb_hw *hw,  in ixgb_mc_addr_list_update()  argument
447 	hw->num_mc_addrs = mc_addr_count;  in ixgb_mc_addr_list_update()
452 		IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);  in ixgb_mc_addr_list_update()
453 		IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);  in ixgb_mc_addr_list_update()
459 		IXGB_WRITE_REG_ARRAY(hw, MTA, i, 0);  in ixgb_mc_addr_list_update()
471 			ixgb_rar_set(hw, mca, rar_used_count);  in ixgb_mc_addr_list_update()
475 			hash_value = ixgb_hash_mc_addr(hw, mca);  in ixgb_mc_addr_list_update()
479 			ixgb_mta_set(hw, hash_value);  in ixgb_mc_addr_list_update()
498 ixgb_hash_mc_addr(struct ixgb_hw *hw,  in ixgb_hash_mc_addr()  argument
508 	switch (hw->mc_filter_type) {  in ixgb_hash_mc_addr()
546 ixgb_mta_set(struct ixgb_hw *hw,  in ixgb_mta_set()  argument
563 	mta_reg = IXGB_READ_REG_ARRAY(hw, MTA, hash_reg);  in ixgb_mta_set()
567 	IXGB_WRITE_REG_ARRAY(hw, MTA, hash_reg, mta_reg);  in ixgb_mta_set()
578 ixgb_rar_set(struct ixgb_hw *hw,  in ixgb_rar_set()  argument
598 	IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);  in ixgb_rar_set()
599 	IXGB_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);  in ixgb_rar_set()
610 ixgb_write_vfta(struct ixgb_hw *hw,  in ixgb_write_vfta()  argument
614 	IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, value);  in ixgb_write_vfta()
623 ixgb_clear_vfta(struct ixgb_hw *hw)  in ixgb_clear_vfta()  argument
628 		IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0);  in ixgb_clear_vfta()
638 ixgb_setup_fc(struct ixgb_hw *hw)  in ixgb_setup_fc()  argument
647 	ctrl_reg = IXGB_READ_REG(hw, CTRL0);  in ixgb_setup_fc()
661 	switch (hw->fc.type) {  in ixgb_setup_fc()
677 		pap_reg = hw->fc.pause_time;  in ixgb_setup_fc()
684 		pap_reg = hw->fc.pause_time;  in ixgb_setup_fc()
694 	IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);  in ixgb_setup_fc()
697 		IXGB_WRITE_REG(hw, PAP, pap_reg);  in ixgb_setup_fc()
705 	if (!(hw->fc.type & ixgb_fc_tx_pause)) {  in ixgb_setup_fc()
706 		IXGB_WRITE_REG(hw, FCRTL, 0);  in ixgb_setup_fc()
707 		IXGB_WRITE_REG(hw, FCRTH, 0);  in ixgb_setup_fc()
712 		if (hw->fc.send_xon) {  in ixgb_setup_fc()
713 			IXGB_WRITE_REG(hw, FCRTL,  in ixgb_setup_fc()
714 				(hw->fc.low_water | IXGB_FCRTL_XONE));  in ixgb_setup_fc()
716 			IXGB_WRITE_REG(hw, FCRTL, hw->fc.low_water);  in ixgb_setup_fc()
718 		IXGB_WRITE_REG(hw, FCRTH, hw->fc.high_water);  in ixgb_setup_fc()
739 ixgb_read_phy_reg(struct ixgb_hw *hw,  in ixgb_read_phy_reg()  argument
758 	IXGB_WRITE_REG(hw, MSCA, command);  in ixgb_read_phy_reg()
771 		command = IXGB_READ_REG(hw, MSCA);  in ixgb_read_phy_reg()
785 	IXGB_WRITE_REG(hw, MSCA, command);  in ixgb_read_phy_reg()
798 		command = IXGB_READ_REG(hw, MSCA);  in ixgb_read_phy_reg()
809 	data = IXGB_READ_REG(hw, MSRWD);  in ixgb_read_phy_reg()
832 ixgb_write_phy_reg(struct ixgb_hw *hw,  in ixgb_write_phy_reg()  argument
846 	IXGB_WRITE_REG(hw, MSRWD, (u32)data);  in ixgb_write_phy_reg()
854 	IXGB_WRITE_REG(hw, MSCA, command);  in ixgb_write_phy_reg()
867 		command = IXGB_READ_REG(hw, MSCA);  in ixgb_write_phy_reg()
881 	IXGB_WRITE_REG(hw, MSCA, command);  in ixgb_write_phy_reg()
894 		command = IXGB_READ_REG(hw, MSCA);  in ixgb_write_phy_reg()
913 ixgb_check_for_link(struct ixgb_hw *hw)  in ixgb_check_for_link()  argument
920 	xpcss_reg = IXGB_READ_REG(hw, XPCSS);  in ixgb_check_for_link()
921 	status_reg = IXGB_READ_REG(hw, STATUS);  in ixgb_check_for_link()
925 		hw->link_up = true;  in ixgb_check_for_link()
929 		hw->link_up = ixgb_link_reset(hw);  in ixgb_check_for_link()
935 		hw->link_up = ixgb_link_reset(hw);  in ixgb_check_for_link()
949 bool ixgb_check_for_bad_link(struct ixgb_hw *hw)  in ixgb_check_for_bad_link()  argument
954 	if (hw->phy_type == ixgb_phy_type_txn17401) {  in ixgb_check_for_bad_link()
955 		newLFC = IXGB_READ_REG(hw, LFC);  in ixgb_check_for_bad_link()
956 		newRFC = IXGB_READ_REG(hw, RFC);  in ixgb_check_for_bad_link()
957 		if ((hw->lastLFC + 250 < newLFC)  in ixgb_check_for_bad_link()
958 		    || (hw->lastRFC + 250 < newRFC)) {  in ixgb_check_for_bad_link()
962 		hw->lastLFC = newLFC;  in ixgb_check_for_bad_link()
963 		hw->lastRFC = newRFC;  in ixgb_check_for_bad_link()
975 ixgb_clear_hw_cntrs(struct ixgb_hw *hw)  in ixgb_clear_hw_cntrs()  argument
982 	if (hw->adapter_stopped) {  in ixgb_clear_hw_cntrs()
987 	temp_reg = IXGB_READ_REG(hw, TPRL);  in ixgb_clear_hw_cntrs()
988 	temp_reg = IXGB_READ_REG(hw, TPRH);  in ixgb_clear_hw_cntrs()
989 	temp_reg = IXGB_READ_REG(hw, GPRCL);  in ixgb_clear_hw_cntrs()
990 	temp_reg = IXGB_READ_REG(hw, GPRCH);  in ixgb_clear_hw_cntrs()
991 	temp_reg = IXGB_READ_REG(hw, BPRCL);  in ixgb_clear_hw_cntrs()
992 	temp_reg = IXGB_READ_REG(hw, BPRCH);  in ixgb_clear_hw_cntrs()
993 	temp_reg = IXGB_READ_REG(hw, MPRCL);  in ixgb_clear_hw_cntrs()
994 	temp_reg = IXGB_READ_REG(hw, MPRCH);  in ixgb_clear_hw_cntrs()
995 	temp_reg = IXGB_READ_REG(hw, UPRCL);  in ixgb_clear_hw_cntrs()
996 	temp_reg = IXGB_READ_REG(hw, UPRCH);  in ixgb_clear_hw_cntrs()
997 	temp_reg = IXGB_READ_REG(hw, VPRCL);  in ixgb_clear_hw_cntrs()
998 	temp_reg = IXGB_READ_REG(hw, VPRCH);  in ixgb_clear_hw_cntrs()
999 	temp_reg = IXGB_READ_REG(hw, JPRCL);  in ixgb_clear_hw_cntrs()
1000 	temp_reg = IXGB_READ_REG(hw, JPRCH);  in ixgb_clear_hw_cntrs()
1001 	temp_reg = IXGB_READ_REG(hw, GORCL);  in ixgb_clear_hw_cntrs()
1002 	temp_reg = IXGB_READ_REG(hw, GORCH);  in ixgb_clear_hw_cntrs()
1003 	temp_reg = IXGB_READ_REG(hw, TORL);  in ixgb_clear_hw_cntrs()
1004 	temp_reg = IXGB_READ_REG(hw, TORH);  in ixgb_clear_hw_cntrs()
1005 	temp_reg = IXGB_READ_REG(hw, RNBC);  in ixgb_clear_hw_cntrs()
1006 	temp_reg = IXGB_READ_REG(hw, RUC);  in ixgb_clear_hw_cntrs()
1007 	temp_reg = IXGB_READ_REG(hw, ROC);  in ixgb_clear_hw_cntrs()
1008 	temp_reg = IXGB_READ_REG(hw, RLEC);  in ixgb_clear_hw_cntrs()
1009 	temp_reg = IXGB_READ_REG(hw, CRCERRS);  in ixgb_clear_hw_cntrs()
1010 	temp_reg = IXGB_READ_REG(hw, ICBC);  in ixgb_clear_hw_cntrs()
1011 	temp_reg = IXGB_READ_REG(hw, ECBC);  in ixgb_clear_hw_cntrs()
1012 	temp_reg = IXGB_READ_REG(hw, MPC);  in ixgb_clear_hw_cntrs()
1013 	temp_reg = IXGB_READ_REG(hw, TPTL);  in ixgb_clear_hw_cntrs()
1014 	temp_reg = IXGB_READ_REG(hw, TPTH);  in ixgb_clear_hw_cntrs()
1015 	temp_reg = IXGB_READ_REG(hw, GPTCL);  in ixgb_clear_hw_cntrs()
1016 	temp_reg = IXGB_READ_REG(hw, GPTCH);  in ixgb_clear_hw_cntrs()
1017 	temp_reg = IXGB_READ_REG(hw, BPTCL);  in ixgb_clear_hw_cntrs()
1018 	temp_reg = IXGB_READ_REG(hw, BPTCH);  in ixgb_clear_hw_cntrs()
1019 	temp_reg = IXGB_READ_REG(hw, MPTCL);  in ixgb_clear_hw_cntrs()
1020 	temp_reg = IXGB_READ_REG(hw, MPTCH);  in ixgb_clear_hw_cntrs()
1021 	temp_reg = IXGB_READ_REG(hw, UPTCL);  in ixgb_clear_hw_cntrs()
1022 	temp_reg = IXGB_READ_REG(hw, UPTCH);  in ixgb_clear_hw_cntrs()
1023 	temp_reg = IXGB_READ_REG(hw, VPTCL);  in ixgb_clear_hw_cntrs()
1024 	temp_reg = IXGB_READ_REG(hw, VPTCH);  in ixgb_clear_hw_cntrs()
1025 	temp_reg = IXGB_READ_REG(hw, JPTCL);  in ixgb_clear_hw_cntrs()
1026 	temp_reg = IXGB_READ_REG(hw, JPTCH);  in ixgb_clear_hw_cntrs()
1027 	temp_reg = IXGB_READ_REG(hw, GOTCL);  in ixgb_clear_hw_cntrs()
1028 	temp_reg = IXGB_READ_REG(hw, GOTCH);  in ixgb_clear_hw_cntrs()
1029 	temp_reg = IXGB_READ_REG(hw, TOTL);  in ixgb_clear_hw_cntrs()
1030 	temp_reg = IXGB_READ_REG(hw, TOTH);  in ixgb_clear_hw_cntrs()
1031 	temp_reg = IXGB_READ_REG(hw, DC);  in ixgb_clear_hw_cntrs()
1032 	temp_reg = IXGB_READ_REG(hw, PLT64C);  in ixgb_clear_hw_cntrs()
1033 	temp_reg = IXGB_READ_REG(hw, TSCTC);  in ixgb_clear_hw_cntrs()
1034 	temp_reg = IXGB_READ_REG(hw, TSCTFC);  in ixgb_clear_hw_cntrs()
1035 	temp_reg = IXGB_READ_REG(hw, IBIC);  in ixgb_clear_hw_cntrs()
1036 	temp_reg = IXGB_READ_REG(hw, RFC);  in ixgb_clear_hw_cntrs()
1037 	temp_reg = IXGB_READ_REG(hw, LFC);  in ixgb_clear_hw_cntrs()
1038 	temp_reg = IXGB_READ_REG(hw, PFRC);  in ixgb_clear_hw_cntrs()
1039 	temp_reg = IXGB_READ_REG(hw, PFTC);  in ixgb_clear_hw_cntrs()
1040 	temp_reg = IXGB_READ_REG(hw, MCFRC);  in ixgb_clear_hw_cntrs()
1041 	temp_reg = IXGB_READ_REG(hw, MCFTC);  in ixgb_clear_hw_cntrs()
1042 	temp_reg = IXGB_READ_REG(hw, XONRXC);  in ixgb_clear_hw_cntrs()
1043 	temp_reg = IXGB_READ_REG(hw, XONTXC);  in ixgb_clear_hw_cntrs()
1044 	temp_reg = IXGB_READ_REG(hw, XOFFRXC);  in ixgb_clear_hw_cntrs()
1045 	temp_reg = IXGB_READ_REG(hw, XOFFTXC);  in ixgb_clear_hw_cntrs()
1046 	temp_reg = IXGB_READ_REG(hw, RJC);  in ixgb_clear_hw_cntrs()
1055 ixgb_led_on(struct ixgb_hw *hw)  in ixgb_led_on()  argument
1057 	u32 ctrl0_reg = IXGB_READ_REG(hw, CTRL0);  in ixgb_led_on()
1061 	IXGB_WRITE_REG(hw, CTRL0, ctrl0_reg);  in ixgb_led_on()
1070 ixgb_led_off(struct ixgb_hw *hw)  in ixgb_led_off()  argument
1072 	u32 ctrl0_reg = IXGB_READ_REG(hw, CTRL0);  in ixgb_led_off()
1076 	IXGB_WRITE_REG(hw, CTRL0, ctrl0_reg);  in ixgb_led_off()
1085 ixgb_get_bus_info(struct ixgb_hw *hw)  in ixgb_get_bus_info()  argument
1089 	status_reg = IXGB_READ_REG(hw, STATUS);  in ixgb_get_bus_info()
1091 	hw->bus.type = (status_reg & IXGB_STATUS_PCIX_MODE) ?  in ixgb_get_bus_info()
1094 	if (hw->bus.type == ixgb_bus_type_pci) {  in ixgb_get_bus_info()
1095 		hw->bus.speed = (status_reg & IXGB_STATUS_PCI_SPD) ?  in ixgb_get_bus_info()
1100 			hw->bus.speed = ixgb_bus_speed_66;  in ixgb_get_bus_info()
1103 			hw->bus.speed = ixgb_bus_speed_100;  in ixgb_get_bus_info()
1106 			hw->bus.speed = ixgb_bus_speed_133;  in ixgb_get_bus_info()
1109 			hw->bus.speed = ixgb_bus_speed_reserved;  in ixgb_get_bus_info()
1114 	hw->bus.width = (status_reg & IXGB_STATUS_BUS64) ?  in ixgb_get_bus_info()
1155 ixgb_link_reset(struct ixgb_hw *hw)  in ixgb_link_reset()  argument
1163 		IXGB_WRITE_REG(hw, CTRL0,  in ixgb_link_reset()
1164 			       IXGB_READ_REG(hw, CTRL0) | IXGB_CTRL0_LRST);  in ixgb_link_reset()
1170 			    ((IXGB_READ_REG(hw, STATUS) & IXGB_STATUS_LU)  in ixgb_link_reset()
1171 			     && (IXGB_READ_REG(hw, XPCSS) &  in ixgb_link_reset()
1186 ixgb_optics_reset(struct ixgb_hw *hw)  in ixgb_optics_reset()  argument
1188 	if (hw->phy_type == ixgb_phy_type_txn17401) {  in ixgb_optics_reset()
1191 		ixgb_write_phy_reg(hw,  in ixgb_optics_reset()
1197 		mdio_reg = ixgb_read_phy_reg(hw,  in ixgb_optics_reset()
1219 ixgb_optics_reset_bcm(struct ixgb_hw *hw)  in ixgb_optics_reset_bcm()  argument
1221 	u32 ctrl = IXGB_READ_REG(hw, CTRL0);  in ixgb_optics_reset_bcm()
1224 	IXGB_WRITE_REG(hw, CTRL0, ctrl);  in ixgb_optics_reset_bcm()
1225 	IXGB_WRITE_FLUSH(hw);  in ixgb_optics_reset_bcm()
1232 	ixgb_write_phy_reg(hw,  in ixgb_optics_reset_bcm()
1238 	ixgb_read_phy_reg(hw,  in ixgb_optics_reset_bcm()
1242 	ixgb_read_phy_reg(hw,  in ixgb_optics_reset_bcm()
1247 	ixgb_write_phy_reg(hw,  in ixgb_optics_reset_bcm()
1252 	ixgb_read_phy_reg(hw,  in ixgb_optics_reset_bcm()
1256 	ixgb_read_phy_reg(hw,  in ixgb_optics_reset_bcm()