Lines Matching refs:hw
67 static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw);
68 static s32 igb_reset_mdicnfg_82580(struct e1000_hw *hw);
69 static s32 igb_validate_nvm_checksum_82580(struct e1000_hw *hw);
70 static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw);
71 static s32 igb_validate_nvm_checksum_i350(struct e1000_hw *hw);
72 static s32 igb_update_nvm_checksum_i350(struct e1000_hw *hw);
83 static bool igb_sgmii_uses_mdio_82575(struct e1000_hw *hw) in igb_sgmii_uses_mdio_82575() argument
88 switch (hw->mac.type) { in igb_sgmii_uses_mdio_82575()
114 static s32 igb_check_for_link_media_swap(struct e1000_hw *hw) in igb_check_for_link_media_swap() argument
116 struct e1000_phy_info *phy = &hw->phy; in igb_check_for_link_media_swap()
122 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); in igb_check_for_link_media_swap()
126 ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data); in igb_check_for_link_media_swap()
134 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 1); in igb_check_for_link_media_swap()
138 ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data); in igb_check_for_link_media_swap()
143 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); in igb_check_for_link_media_swap()
151 if (port && (hw->dev_spec._82575.media_port != port)) { in igb_check_for_link_media_swap()
152 hw->dev_spec._82575.media_port = port; in igb_check_for_link_media_swap()
153 hw->dev_spec._82575.media_changed = true; in igb_check_for_link_media_swap()
155 ret_val = igb_check_for_link_82575(hw); in igb_check_for_link_media_swap()
165 static s32 igb_init_phy_params_82575(struct e1000_hw *hw) in igb_init_phy_params_82575() argument
167 struct e1000_phy_info *phy = &hw->phy; in igb_init_phy_params_82575()
171 if (hw->phy.media_type != e1000_media_type_copper) { in igb_init_phy_params_82575()
181 if (igb_sgmii_active_82575(hw)) { in igb_init_phy_params_82575()
190 igb_reset_mdicnfg_82580(hw); in igb_init_phy_params_82575()
192 if (igb_sgmii_active_82575(hw) && !igb_sgmii_uses_mdio_82575(hw)) { in igb_init_phy_params_82575()
196 switch (hw->mac.type) { in igb_init_phy_params_82575()
215 hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >> in igb_init_phy_params_82575()
219 ret_val = igb_get_phy_id_82575(hw); in igb_init_phy_params_82575()
242 ret_val = phy->ops.write_reg(hw, in igb_init_phy_params_82575()
248 ret_val = phy->ops.read_reg(hw, in igb_init_phy_params_82575()
258 hw->mac.ops.check_for_link = in igb_init_phy_params_82575()
302 static s32 igb_init_nvm_params_82575(struct e1000_hw *hw) in igb_init_nvm_params_82575() argument
304 struct e1000_nvm_info *nvm = &hw->nvm; in igb_init_nvm_params_82575()
358 switch (hw->mac.type) { in igb_init_nvm_params_82575()
379 static s32 igb_init_mac_params_82575(struct e1000_hw *hw) in igb_init_mac_params_82575() argument
381 struct e1000_mac_info *mac = &hw->mac; in igb_init_mac_params_82575()
382 struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; in igb_init_mac_params_82575()
433 (hw->phy.media_type == e1000_media_type_copper) in igb_init_mac_params_82575()
438 switch (hw->device_id) { in igb_init_mac_params_82575()
446 hw->dev_spec._82575.mas_capable = true; in igb_init_mac_params_82575()
460 static s32 igb_set_sfp_media_type_82575(struct e1000_hw *hw) in igb_set_sfp_media_type_82575() argument
464 struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; in igb_set_sfp_media_type_82575()
478 ret_val = igb_read_sfp_data_byte(hw, in igb_set_sfp_media_type_82575()
489 ret_val = igb_read_sfp_data_byte(hw, in igb_set_sfp_media_type_82575()
500 hw->phy.media_type = e1000_media_type_internal_serdes; in igb_set_sfp_media_type_82575()
503 hw->phy.media_type = e1000_media_type_internal_serdes; in igb_set_sfp_media_type_82575()
506 hw->phy.media_type = e1000_media_type_copper; in igb_set_sfp_media_type_82575()
508 hw->phy.media_type = e1000_media_type_unknown; in igb_set_sfp_media_type_82575()
513 hw->phy.media_type = e1000_media_type_unknown; in igb_set_sfp_media_type_82575()
522 static s32 igb_get_invariants_82575(struct e1000_hw *hw) in igb_get_invariants_82575() argument
524 struct e1000_mac_info *mac = &hw->mac; in igb_get_invariants_82575()
525 struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; in igb_get_invariants_82575()
530 switch (hw->device_id) { in igb_get_invariants_82575()
591 hw->phy.media_type = e1000_media_type_copper; in igb_get_invariants_82575()
600 hw->phy.media_type = e1000_media_type_internal_serdes; in igb_get_invariants_82575()
604 if (igb_sgmii_uses_mdio_82575(hw)) { in igb_get_invariants_82575()
605 hw->phy.media_type = e1000_media_type_copper; in igb_get_invariants_82575()
612 ret_val = igb_set_sfp_media_type_82575(hw); in igb_get_invariants_82575()
614 (hw->phy.media_type == e1000_media_type_unknown)) { in igb_get_invariants_82575()
618 hw->phy.media_type = e1000_media_type_internal_serdes; in igb_get_invariants_82575()
621 hw->phy.media_type = e1000_media_type_copper; in igb_get_invariants_82575()
635 if (hw->phy.media_type == e1000_media_type_copper) in igb_get_invariants_82575()
648 ret_val = igb_init_mac_params_82575(hw); in igb_get_invariants_82575()
653 ret_val = igb_init_nvm_params_82575(hw); in igb_get_invariants_82575()
654 switch (hw->mac.type) { in igb_get_invariants_82575()
657 ret_val = igb_init_nvm_params_i210(hw); in igb_get_invariants_82575()
670 igb_init_mbx_params_pf(hw); in igb_get_invariants_82575()
677 ret_val = igb_init_phy_params_82575(hw); in igb_get_invariants_82575()
690 static s32 igb_acquire_phy_82575(struct e1000_hw *hw) in igb_acquire_phy_82575() argument
694 if (hw->bus.func == E1000_FUNC_1) in igb_acquire_phy_82575()
696 else if (hw->bus.func == E1000_FUNC_2) in igb_acquire_phy_82575()
698 else if (hw->bus.func == E1000_FUNC_3) in igb_acquire_phy_82575()
701 return hw->mac.ops.acquire_swfw_sync(hw, mask); in igb_acquire_phy_82575()
711 static void igb_release_phy_82575(struct e1000_hw *hw) in igb_release_phy_82575() argument
715 if (hw->bus.func == E1000_FUNC_1) in igb_release_phy_82575()
717 else if (hw->bus.func == E1000_FUNC_2) in igb_release_phy_82575()
719 else if (hw->bus.func == E1000_FUNC_3) in igb_release_phy_82575()
722 hw->mac.ops.release_swfw_sync(hw, mask); in igb_release_phy_82575()
734 static s32 igb_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset, in igb_read_phy_reg_sgmii_82575() argument
744 ret_val = hw->phy.ops.acquire(hw); in igb_read_phy_reg_sgmii_82575()
748 ret_val = igb_read_phy_reg_i2c(hw, offset, data); in igb_read_phy_reg_sgmii_82575()
750 hw->phy.ops.release(hw); in igb_read_phy_reg_sgmii_82575()
765 static s32 igb_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset, in igb_write_phy_reg_sgmii_82575() argument
776 ret_val = hw->phy.ops.acquire(hw); in igb_write_phy_reg_sgmii_82575()
780 ret_val = igb_write_phy_reg_i2c(hw, offset, data); in igb_write_phy_reg_sgmii_82575()
782 hw->phy.ops.release(hw); in igb_write_phy_reg_sgmii_82575()
795 static s32 igb_get_phy_id_82575(struct e1000_hw *hw) in igb_get_phy_id_82575() argument
797 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id_82575()
804 if (hw->mac.type == e1000_i354) in igb_get_phy_id_82575()
805 igb_get_phy_id(hw); in igb_get_phy_id_82575()
813 if (!(igb_sgmii_active_82575(hw))) { in igb_get_phy_id_82575()
815 ret_val = igb_get_phy_id(hw); in igb_get_phy_id_82575()
819 if (igb_sgmii_uses_mdio_82575(hw)) { in igb_get_phy_id_82575()
820 switch (hw->mac.type) { in igb_get_phy_id_82575()
840 ret_val = igb_get_phy_id(hw); in igb_get_phy_id_82575()
854 ret_val = igb_read_phy_reg_sgmii_82575(hw, PHY_ID1, &phy_id); in igb_get_phy_id_82575()
874 ret_val = igb_get_phy_id(hw); in igb_get_phy_id_82575()
890 static s32 igb_phy_hw_reset_sgmii_82575(struct e1000_hw *hw) in igb_phy_hw_reset_sgmii_82575() argument
903 ret_val = hw->phy.ops.write_reg(hw, 0x1B, 0x8084); in igb_phy_hw_reset_sgmii_82575()
907 ret_val = igb_phy_sw_reset(hw); in igb_phy_hw_reset_sgmii_82575()
926 static s32 igb_set_d0_lplu_state_82575(struct e1000_hw *hw, bool active) in igb_set_d0_lplu_state_82575() argument
928 struct e1000_phy_info *phy = &hw->phy; in igb_set_d0_lplu_state_82575()
932 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in igb_set_d0_lplu_state_82575()
938 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in igb_set_d0_lplu_state_82575()
944 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in igb_set_d0_lplu_state_82575()
947 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in igb_set_d0_lplu_state_82575()
953 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in igb_set_d0_lplu_state_82575()
961 ret_val = phy->ops.read_reg(hw, in igb_set_d0_lplu_state_82575()
967 ret_val = phy->ops.write_reg(hw, in igb_set_d0_lplu_state_82575()
972 ret_val = phy->ops.read_reg(hw, in igb_set_d0_lplu_state_82575()
978 ret_val = phy->ops.write_reg(hw, in igb_set_d0_lplu_state_82575()
1002 static s32 igb_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active) in igb_set_d0_lplu_state_82580() argument
1004 struct e1000_phy_info *phy = &hw->phy; in igb_set_d0_lplu_state_82580()
1045 static s32 igb_set_d3_lplu_state_82580(struct e1000_hw *hw, bool active) in igb_set_d3_lplu_state_82580() argument
1047 struct e1000_phy_info *phy = &hw->phy; in igb_set_d3_lplu_state_82580()
1084 static s32 igb_acquire_nvm_82575(struct e1000_hw *hw) in igb_acquire_nvm_82575() argument
1088 ret_val = hw->mac.ops.acquire_swfw_sync(hw, E1000_SWFW_EEP_SM); in igb_acquire_nvm_82575()
1092 ret_val = igb_acquire_nvm(hw); in igb_acquire_nvm_82575()
1095 hw->mac.ops.release_swfw_sync(hw, E1000_SWFW_EEP_SM); in igb_acquire_nvm_82575()
1108 static void igb_release_nvm_82575(struct e1000_hw *hw) in igb_release_nvm_82575() argument
1110 igb_release_nvm(hw); in igb_release_nvm_82575()
1111 hw->mac.ops.release_swfw_sync(hw, E1000_SWFW_EEP_SM); in igb_release_nvm_82575()
1122 static s32 igb_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask) in igb_acquire_swfw_sync_82575() argument
1131 if (igb_get_hw_semaphore(hw)) { in igb_acquire_swfw_sync_82575()
1143 igb_put_hw_semaphore(hw); in igb_acquire_swfw_sync_82575()
1157 igb_put_hw_semaphore(hw); in igb_acquire_swfw_sync_82575()
1171 static void igb_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask) in igb_release_swfw_sync_82575() argument
1175 while (igb_get_hw_semaphore(hw) != 0) in igb_release_swfw_sync_82575()
1182 igb_put_hw_semaphore(hw); in igb_release_swfw_sync_82575()
1195 static s32 igb_get_cfg_done_82575(struct e1000_hw *hw) in igb_get_cfg_done_82575() argument
1200 if (hw->bus.func == 1) in igb_get_cfg_done_82575()
1202 else if (hw->bus.func == E1000_FUNC_2) in igb_get_cfg_done_82575()
1204 else if (hw->bus.func == E1000_FUNC_3) in igb_get_cfg_done_82575()
1218 (hw->phy.type == e1000_phy_igp_3)) in igb_get_cfg_done_82575()
1219 igb_phy_init_script_igp3(hw); in igb_get_cfg_done_82575()
1234 static s32 igb_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed, in igb_get_link_up_info_82575() argument
1239 if (hw->phy.media_type != e1000_media_type_copper) in igb_get_link_up_info_82575()
1240 ret_val = igb_get_pcs_speed_and_duplex_82575(hw, speed, in igb_get_link_up_info_82575()
1243 ret_val = igb_get_speed_and_duplex_copper(hw, speed, in igb_get_link_up_info_82575()
1256 static s32 igb_check_for_link_82575(struct e1000_hw *hw) in igb_check_for_link_82575() argument
1261 if (hw->phy.media_type != e1000_media_type_copper) { in igb_check_for_link_82575()
1262 ret_val = igb_get_pcs_speed_and_duplex_82575(hw, &speed, in igb_check_for_link_82575()
1268 hw->mac.get_link_status = !hw->mac.serdes_has_link; in igb_check_for_link_82575()
1275 ret_val = igb_config_fc_after_link_up(hw); in igb_check_for_link_82575()
1279 ret_val = igb_check_for_copper_link(hw); in igb_check_for_link_82575()
1289 void igb_power_up_serdes_link_82575(struct e1000_hw *hw) in igb_power_up_serdes_link_82575() argument
1294 if ((hw->phy.media_type != e1000_media_type_internal_serdes) && in igb_power_up_serdes_link_82575()
1295 !igb_sgmii_active_82575(hw)) in igb_power_up_serdes_link_82575()
1322 static s32 igb_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, u16 *speed, in igb_get_pcs_speed_and_duplex_82575() argument
1325 struct e1000_mac_info *mac = &hw->mac; in igb_get_pcs_speed_and_duplex_82575()
1384 void igb_shutdown_serdes_link_82575(struct e1000_hw *hw) in igb_shutdown_serdes_link_82575() argument
1388 if (hw->phy.media_type != e1000_media_type_internal_serdes && in igb_shutdown_serdes_link_82575()
1389 igb_sgmii_active_82575(hw)) in igb_shutdown_serdes_link_82575()
1392 if (!igb_enable_mng_pass_thru(hw)) { in igb_shutdown_serdes_link_82575()
1416 static s32 igb_reset_hw_82575(struct e1000_hw *hw) in igb_reset_hw_82575() argument
1424 ret_val = igb_disable_pcie_master(hw); in igb_reset_hw_82575()
1429 ret_val = igb_set_pcie_completion_timeout(hw); in igb_reset_hw_82575()
1447 ret_val = igb_get_auto_rd_done(hw); in igb_reset_hw_82575()
1458 igb_reset_init_script_82575(hw); in igb_reset_hw_82575()
1465 ret_val = igb_check_alt_mac_addr(hw); in igb_reset_hw_82575()
1476 static s32 igb_init_hw_82575(struct e1000_hw *hw) in igb_init_hw_82575() argument
1478 struct e1000_mac_info *mac = &hw->mac; in igb_init_hw_82575()
1482 if ((hw->mac.type >= e1000_i210) && in igb_init_hw_82575()
1483 !(igb_get_flash_presence_i210(hw))) { in igb_init_hw_82575()
1484 ret_val = igb_pll_workaround_i210(hw); in igb_init_hw_82575()
1490 ret_val = igb_id_led_init(hw); in igb_init_hw_82575()
1498 if ((hw->mac.type == e1000_i350) || (hw->mac.type == e1000_i354)) in igb_init_hw_82575()
1499 igb_clear_vfta_i350(hw); in igb_init_hw_82575()
1501 igb_clear_vfta(hw); in igb_init_hw_82575()
1504 igb_init_rx_addrs(hw, rar_count); in igb_init_hw_82575()
1517 ret_val = igb_setup_link(hw); in igb_init_hw_82575()
1524 igb_clear_hw_cntrs_82575(hw); in igb_init_hw_82575()
1536 static s32 igb_setup_copper_link_82575(struct e1000_hw *hw) in igb_setup_copper_link_82575() argument
1548 switch (hw->mac.type) { in igb_setup_copper_link_82575()
1561 ret_val = igb_setup_serdes_link_82575(hw); in igb_setup_copper_link_82575()
1565 if (igb_sgmii_active_82575(hw) && !hw->phy.reset_disable) { in igb_setup_copper_link_82575()
1569 ret_val = hw->phy.ops.reset(hw); in igb_setup_copper_link_82575()
1575 switch (hw->phy.type) { in igb_setup_copper_link_82575()
1578 switch (hw->phy.id) { in igb_setup_copper_link_82575()
1583 ret_val = igb_copper_link_setup_m88_gen2(hw); in igb_setup_copper_link_82575()
1586 ret_val = igb_copper_link_setup_m88(hw); in igb_setup_copper_link_82575()
1591 ret_val = igb_copper_link_setup_igp(hw); in igb_setup_copper_link_82575()
1594 ret_val = igb_copper_link_setup_82580(hw); in igb_setup_copper_link_82575()
1604 ret_val = igb_setup_copper_link(hw); in igb_setup_copper_link_82575()
1618 static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw) in igb_setup_serdes_link_82575() argument
1625 if ((hw->phy.media_type != e1000_media_type_internal_serdes) && in igb_setup_serdes_link_82575()
1626 !igb_sgmii_active_82575(hw)) in igb_setup_serdes_link_82575()
1646 if (hw->mac.type == e1000_82575 || hw->mac.type == e1000_82576) { in igb_setup_serdes_link_82575()
1659 pcs_autoneg = hw->mac.autoneg; in igb_setup_serdes_link_82575()
1672 if (hw->mac.type == e1000_82575 || in igb_setup_serdes_link_82575()
1673 hw->mac.type == e1000_82576) { in igb_setup_serdes_link_82575()
1674 ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &data); in igb_setup_serdes_link_82575()
1717 switch (hw->fc.requested_mode) { in igb_setup_serdes_link_82575()
1744 if (!pcs_autoneg && !igb_sgmii_active_82575(hw)) in igb_setup_serdes_link_82575()
1745 igb_force_mac_fc(hw); in igb_setup_serdes_link_82575()
1758 static bool igb_sgmii_active_82575(struct e1000_hw *hw) in igb_sgmii_active_82575() argument
1760 struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575; in igb_sgmii_active_82575()
1771 static s32 igb_reset_init_script_82575(struct e1000_hw *hw) in igb_reset_init_script_82575() argument
1773 if (hw->mac.type == e1000_82575) { in igb_reset_init_script_82575()
1776 igb_write_8bit_ctrl_reg(hw, E1000_SCTL, 0x00, 0x0C); in igb_reset_init_script_82575()
1777 igb_write_8bit_ctrl_reg(hw, E1000_SCTL, 0x01, 0x78); in igb_reset_init_script_82575()
1778 igb_write_8bit_ctrl_reg(hw, E1000_SCTL, 0x1B, 0x23); in igb_reset_init_script_82575()
1779 igb_write_8bit_ctrl_reg(hw, E1000_SCTL, 0x23, 0x15); in igb_reset_init_script_82575()
1782 igb_write_8bit_ctrl_reg(hw, E1000_CCMCTL, 0x14, 0x00); in igb_reset_init_script_82575()
1783 igb_write_8bit_ctrl_reg(hw, E1000_CCMCTL, 0x10, 0x00); in igb_reset_init_script_82575()
1786 igb_write_8bit_ctrl_reg(hw, E1000_GIOCTL, 0x00, 0xEC); in igb_reset_init_script_82575()
1787 igb_write_8bit_ctrl_reg(hw, E1000_GIOCTL, 0x61, 0xDF); in igb_reset_init_script_82575()
1788 igb_write_8bit_ctrl_reg(hw, E1000_GIOCTL, 0x34, 0x05); in igb_reset_init_script_82575()
1789 igb_write_8bit_ctrl_reg(hw, E1000_GIOCTL, 0x2F, 0x81); in igb_reset_init_script_82575()
1792 igb_write_8bit_ctrl_reg(hw, E1000_SCCTL, 0x02, 0x47); in igb_reset_init_script_82575()
1793 igb_write_8bit_ctrl_reg(hw, E1000_SCCTL, 0x14, 0x00); in igb_reset_init_script_82575()
1794 igb_write_8bit_ctrl_reg(hw, E1000_SCCTL, 0x10, 0x00); in igb_reset_init_script_82575()
1804 static s32 igb_read_mac_addr_82575(struct e1000_hw *hw) in igb_read_mac_addr_82575() argument
1812 ret_val = igb_check_alt_mac_addr(hw); in igb_read_mac_addr_82575()
1816 ret_val = igb_read_mac_addr(hw); in igb_read_mac_addr_82575()
1829 void igb_power_down_phy_copper_82575(struct e1000_hw *hw) in igb_power_down_phy_copper_82575() argument
1832 if (!(igb_enable_mng_pass_thru(hw) || igb_check_reset_block(hw))) in igb_power_down_phy_copper_82575()
1833 igb_power_down_phy_copper(hw); in igb_power_down_phy_copper_82575()
1842 static void igb_clear_hw_cntrs_82575(struct e1000_hw *hw) in igb_clear_hw_cntrs_82575() argument
1844 igb_clear_hw_cntrs_base(hw); in igb_clear_hw_cntrs_82575()
1894 if (hw->phy.media_type == e1000_media_type_internal_serdes || in igb_clear_hw_cntrs_82575()
1895 igb_sgmii_active_82575(hw)) in igb_clear_hw_cntrs_82575()
1908 void igb_rx_fifo_flush_82575(struct e1000_hw *hw) in igb_rx_fifo_flush_82575() argument
1913 if (hw->mac.type != e1000_82575 || in igb_rx_fifo_flush_82575()
1982 static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw) in igb_set_pcie_completion_timeout() argument
2004 ret_val = igb_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2, in igb_set_pcie_completion_timeout()
2011 ret_val = igb_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2, in igb_set_pcie_completion_timeout()
2029 void igb_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf) in igb_vmdq_set_anti_spoofing_pf() argument
2033 switch (hw->mac.type) { in igb_vmdq_set_anti_spoofing_pf()
2067 void igb_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable) in igb_vmdq_set_loopback_pf() argument
2071 switch (hw->mac.type) { in igb_vmdq_set_loopback_pf()
2103 void igb_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable) in igb_vmdq_set_replication_pf() argument
2124 static s32 igb_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data) in igb_read_phy_reg_82580() argument
2128 ret_val = hw->phy.ops.acquire(hw); in igb_read_phy_reg_82580()
2132 ret_val = igb_read_phy_reg_mdic(hw, offset, data); in igb_read_phy_reg_82580()
2134 hw->phy.ops.release(hw); in igb_read_phy_reg_82580()
2148 static s32 igb_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data) in igb_write_phy_reg_82580() argument
2153 ret_val = hw->phy.ops.acquire(hw); in igb_write_phy_reg_82580()
2157 ret_val = igb_write_phy_reg_mdic(hw, offset, data); in igb_write_phy_reg_82580()
2159 hw->phy.ops.release(hw); in igb_write_phy_reg_82580()
2173 static s32 igb_reset_mdicnfg_82580(struct e1000_hw *hw) in igb_reset_mdicnfg_82580() argument
2179 if (hw->mac.type != e1000_82580) in igb_reset_mdicnfg_82580()
2181 if (!igb_sgmii_active_82575(hw)) in igb_reset_mdicnfg_82580()
2184 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A + in igb_reset_mdicnfg_82580()
2185 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1, in igb_reset_mdicnfg_82580()
2209 static s32 igb_reset_hw_82580(struct e1000_hw *hw) in igb_reset_hw_82580() argument
2215 bool global_device_reset = hw->dev_spec._82575.global_device_reset; in igb_reset_hw_82580()
2217 hw->dev_spec._82575.global_device_reset = false; in igb_reset_hw_82580()
2222 if (hw->mac.type == e1000_82580) in igb_reset_hw_82580()
2231 ret_val = igb_disable_pcie_master(hw); in igb_reset_hw_82580()
2245 hw->mac.ops.acquire_swfw_sync(hw, swmbsw_mask)) in igb_reset_hw_82580()
2261 ret_val = igb_get_auto_rd_done(hw); in igb_reset_hw_82580()
2277 ret_val = igb_reset_mdicnfg_82580(hw); in igb_reset_hw_82580()
2282 ret_val = igb_check_alt_mac_addr(hw); in igb_reset_hw_82580()
2286 hw->mac.ops.release_swfw_sync(hw, swmbsw_mask); in igb_reset_hw_82580()
2320 static s32 igb_validate_nvm_checksum_with_offset(struct e1000_hw *hw, in igb_validate_nvm_checksum_with_offset() argument
2328 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); in igb_validate_nvm_checksum_with_offset()
2356 static s32 igb_update_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset) in igb_update_nvm_checksum_with_offset() argument
2363 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); in igb_update_nvm_checksum_with_offset()
2371 ret_val = hw->nvm.ops.write(hw, (NVM_CHECKSUM_REG + offset), 1, in igb_update_nvm_checksum_with_offset()
2388 static s32 igb_validate_nvm_checksum_82580(struct e1000_hw *hw) in igb_validate_nvm_checksum_82580() argument
2395 ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data); in igb_validate_nvm_checksum_82580()
2410 ret_val = igb_validate_nvm_checksum_with_offset(hw, in igb_validate_nvm_checksum_82580()
2428 static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw) in igb_update_nvm_checksum_82580() argument
2434 ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data); in igb_update_nvm_checksum_82580()
2443 ret_val = hw->nvm.ops.write(hw, NVM_COMPATIBILITY_REG_3, 1, in igb_update_nvm_checksum_82580()
2453 ret_val = igb_update_nvm_checksum_with_offset(hw, nvm_offset); in igb_update_nvm_checksum_82580()
2470 static s32 igb_validate_nvm_checksum_i350(struct e1000_hw *hw) in igb_validate_nvm_checksum_i350() argument
2478 ret_val = igb_validate_nvm_checksum_with_offset(hw, in igb_validate_nvm_checksum_i350()
2496 static s32 igb_update_nvm_checksum_i350(struct e1000_hw *hw) in igb_update_nvm_checksum_i350() argument
2504 ret_val = igb_update_nvm_checksum_with_offset(hw, nvm_offset); in igb_update_nvm_checksum_i350()
2520 static s32 __igb_access_emi_reg(struct e1000_hw *hw, u16 address, in __igb_access_emi_reg() argument
2525 ret_val = hw->phy.ops.write_reg(hw, E1000_EMIADD, address); in __igb_access_emi_reg()
2530 ret_val = hw->phy.ops.read_reg(hw, E1000_EMIDATA, data); in __igb_access_emi_reg()
2532 ret_val = hw->phy.ops.write_reg(hw, E1000_EMIDATA, *data); in __igb_access_emi_reg()
2543 s32 igb_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data) in igb_read_emi_reg() argument
2545 return __igb_access_emi_reg(hw, addr, data, true); in igb_read_emi_reg()
2557 s32 igb_set_eee_i350(struct e1000_hw *hw, bool adv1G, bool adv100M) in igb_set_eee_i350() argument
2561 if ((hw->mac.type < e1000_i350) || in igb_set_eee_i350()
2562 (hw->phy.media_type != e1000_media_type_copper)) in igb_set_eee_i350()
2568 if (!(hw->dev_spec._82575.eee_disable)) { in igb_set_eee_i350()
2613 s32 igb_set_eee_i354(struct e1000_hw *hw, bool adv1G, bool adv100M) in igb_set_eee_i354() argument
2615 struct e1000_phy_info *phy = &hw->phy; in igb_set_eee_i354()
2619 if ((hw->phy.media_type != e1000_media_type_copper) || in igb_set_eee_i354()
2623 if (!hw->dev_spec._82575.eee_disable) { in igb_set_eee_i354()
2625 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 18); in igb_set_eee_i354()
2629 ret_val = phy->ops.read_reg(hw, E1000_M88E1543_EEE_CTRL_1, in igb_set_eee_i354()
2635 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_EEE_CTRL_1, in igb_set_eee_i354()
2641 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in igb_set_eee_i354()
2646 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in igb_set_eee_i354()
2662 ret_val = igb_write_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in igb_set_eee_i354()
2667 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in igb_set_eee_i354()
2675 ret_val = igb_write_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in igb_set_eee_i354()
2692 s32 igb_get_eee_status_i354(struct e1000_hw *hw, bool *status) in igb_get_eee_status_i354() argument
2694 struct e1000_phy_info *phy = &hw->phy; in igb_get_eee_status_i354()
2699 if ((hw->phy.media_type != e1000_media_type_copper) || in igb_get_eee_status_i354()
2703 ret_val = igb_read_xmdio_reg(hw, E1000_PCS_STATUS_ADDR_I354, in igb_get_eee_status_i354()
2736 static s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw) in igb_get_thermal_sensor_data_generic() argument
2745 struct e1000_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in igb_get_thermal_sensor_data_generic()
2747 if ((hw->mac.type != e1000_i350) || (hw->bus.func != 0)) in igb_get_thermal_sensor_data_generic()
2753 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_offset); in igb_get_thermal_sensor_data_generic()
2757 hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg); in igb_get_thermal_sensor_data_generic()
2767 hw->nvm.ops.read(hw, (ets_offset + i), 1, &ets_sensor); in igb_get_thermal_sensor_data_generic()
2774 hw->phy.ops.read_i2c_byte(hw, in igb_get_thermal_sensor_data_generic()
2789 static s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *hw) in igb_init_thermal_sensor_thresh_generic() argument
2800 struct e1000_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in igb_init_thermal_sensor_thresh_generic()
2802 if ((hw->mac.type != e1000_i350) || (hw->bus.func != 0)) in igb_init_thermal_sensor_thresh_generic()
2814 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_offset); in igb_init_thermal_sensor_thresh_generic()
2818 hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg); in igb_init_thermal_sensor_thresh_generic()
2828 hw->nvm.ops.read(hw, (ets_offset + i), 1, &ets_sensor); in igb_init_thermal_sensor_thresh_generic()
2835 hw->phy.ops.write_i2c_byte(hw, in igb_init_thermal_sensor_thresh_generic()