Lines Matching refs:hw
49 static void i40e_adminq_init_regs(struct i40e_hw *hw) in i40e_adminq_init_regs() argument
52 if (i40e_is_vf(hw)) { in i40e_adminq_init_regs()
53 hw->aq.asq.tail = I40E_VF_ATQT1; in i40e_adminq_init_regs()
54 hw->aq.asq.head = I40E_VF_ATQH1; in i40e_adminq_init_regs()
55 hw->aq.asq.len = I40E_VF_ATQLEN1; in i40e_adminq_init_regs()
56 hw->aq.asq.bal = I40E_VF_ATQBAL1; in i40e_adminq_init_regs()
57 hw->aq.asq.bah = I40E_VF_ATQBAH1; in i40e_adminq_init_regs()
58 hw->aq.arq.tail = I40E_VF_ARQT1; in i40e_adminq_init_regs()
59 hw->aq.arq.head = I40E_VF_ARQH1; in i40e_adminq_init_regs()
60 hw->aq.arq.len = I40E_VF_ARQLEN1; in i40e_adminq_init_regs()
61 hw->aq.arq.bal = I40E_VF_ARQBAL1; in i40e_adminq_init_regs()
62 hw->aq.arq.bah = I40E_VF_ARQBAH1; in i40e_adminq_init_regs()
64 hw->aq.asq.tail = I40E_PF_ATQT; in i40e_adminq_init_regs()
65 hw->aq.asq.head = I40E_PF_ATQH; in i40e_adminq_init_regs()
66 hw->aq.asq.len = I40E_PF_ATQLEN; in i40e_adminq_init_regs()
67 hw->aq.asq.bal = I40E_PF_ATQBAL; in i40e_adminq_init_regs()
68 hw->aq.asq.bah = I40E_PF_ATQBAH; in i40e_adminq_init_regs()
69 hw->aq.arq.tail = I40E_PF_ARQT; in i40e_adminq_init_regs()
70 hw->aq.arq.head = I40E_PF_ARQH; in i40e_adminq_init_regs()
71 hw->aq.arq.len = I40E_PF_ARQLEN; in i40e_adminq_init_regs()
72 hw->aq.arq.bal = I40E_PF_ARQBAL; in i40e_adminq_init_regs()
73 hw->aq.arq.bah = I40E_PF_ARQBAH; in i40e_adminq_init_regs()
81 static i40e_status i40e_alloc_adminq_asq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_asq_ring() argument
85 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in i40e_alloc_adminq_asq_ring()
87 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
93 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in i40e_alloc_adminq_asq_ring()
94 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
97 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_alloc_adminq_asq_ring()
108 static i40e_status i40e_alloc_adminq_arq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_arq_ring() argument
112 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in i40e_alloc_adminq_arq_ring()
114 (hw->aq.num_arq_entries * in i40e_alloc_adminq_arq_ring()
128 static void i40e_free_adminq_asq(struct i40e_hw *hw) in i40e_free_adminq_asq() argument
130 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_adminq_asq()
140 static void i40e_free_adminq_arq(struct i40e_hw *hw) in i40e_free_adminq_arq() argument
142 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_adminq_arq()
149 static i40e_status i40e_alloc_arq_bufs(struct i40e_hw *hw) in i40e_alloc_arq_bufs() argument
161 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head, in i40e_alloc_arq_bufs()
162 (hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem))); in i40e_alloc_arq_bufs()
165 hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va; in i40e_alloc_arq_bufs()
168 for (i = 0; i < hw->aq.num_arq_entries; i++) { in i40e_alloc_arq_bufs()
169 bi = &hw->aq.arq.r.arq_bi[i]; in i40e_alloc_arq_bufs()
170 ret_code = i40e_allocate_dma_mem(hw, bi, in i40e_alloc_arq_bufs()
172 hw->aq.arq_buf_size, in i40e_alloc_arq_bufs()
178 desc = I40E_ADMINQ_DESC(hw->aq.arq, i); in i40e_alloc_arq_bufs()
181 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) in i40e_alloc_arq_bufs()
206 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_alloc_arq_bufs()
207 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_alloc_arq_bufs()
216 static i40e_status i40e_alloc_asq_bufs(struct i40e_hw *hw) in i40e_alloc_asq_bufs() argument
223 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head, in i40e_alloc_asq_bufs()
224 (hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem))); in i40e_alloc_asq_bufs()
227 hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va; in i40e_alloc_asq_bufs()
230 for (i = 0; i < hw->aq.num_asq_entries; i++) { in i40e_alloc_asq_bufs()
231 bi = &hw->aq.asq.r.asq_bi[i]; in i40e_alloc_asq_bufs()
232 ret_code = i40e_allocate_dma_mem(hw, bi, in i40e_alloc_asq_bufs()
234 hw->aq.asq_buf_size, in i40e_alloc_asq_bufs()
246 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_alloc_asq_bufs()
247 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_alloc_asq_bufs()
256 static void i40e_free_arq_bufs(struct i40e_hw *hw) in i40e_free_arq_bufs() argument
261 for (i = 0; i < hw->aq.num_arq_entries; i++) in i40e_free_arq_bufs()
262 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); in i40e_free_arq_bufs()
265 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); in i40e_free_arq_bufs()
268 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); in i40e_free_arq_bufs()
275 static void i40e_free_asq_bufs(struct i40e_hw *hw) in i40e_free_asq_bufs() argument
280 for (i = 0; i < hw->aq.num_asq_entries; i++) in i40e_free_asq_bufs()
281 if (hw->aq.asq.r.asq_bi[i].pa) in i40e_free_asq_bufs()
282 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); in i40e_free_asq_bufs()
285 i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); in i40e_free_asq_bufs()
288 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_free_asq_bufs()
291 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); in i40e_free_asq_bufs()
300 static i40e_status i40e_config_asq_regs(struct i40e_hw *hw) in i40e_config_asq_regs() argument
306 wr32(hw, hw->aq.asq.head, 0); in i40e_config_asq_regs()
307 wr32(hw, hw->aq.asq.tail, 0); in i40e_config_asq_regs()
310 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
312 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
313 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
316 reg = rd32(hw, hw->aq.asq.bal); in i40e_config_asq_regs()
317 if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa)) in i40e_config_asq_regs()
329 static i40e_status i40e_config_arq_regs(struct i40e_hw *hw) in i40e_config_arq_regs() argument
335 wr32(hw, hw->aq.arq.head, 0); in i40e_config_arq_regs()
336 wr32(hw, hw->aq.arq.tail, 0); in i40e_config_arq_regs()
339 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
341 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
342 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
345 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in i40e_config_arq_regs()
348 reg = rd32(hw, hw->aq.arq.bal); in i40e_config_arq_regs()
349 if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa)) in i40e_config_arq_regs()
368 static i40e_status i40e_init_asq(struct i40e_hw *hw) in i40e_init_asq() argument
372 if (hw->aq.asq.count > 0) { in i40e_init_asq()
379 if ((hw->aq.num_asq_entries == 0) || in i40e_init_asq()
380 (hw->aq.asq_buf_size == 0)) { in i40e_init_asq()
385 hw->aq.asq.next_to_use = 0; in i40e_init_asq()
386 hw->aq.asq.next_to_clean = 0; in i40e_init_asq()
387 hw->aq.asq.count = hw->aq.num_asq_entries; in i40e_init_asq()
390 ret_code = i40e_alloc_adminq_asq_ring(hw); in i40e_init_asq()
395 ret_code = i40e_alloc_asq_bufs(hw); in i40e_init_asq()
400 ret_code = i40e_config_asq_regs(hw); in i40e_init_asq()
408 i40e_free_adminq_asq(hw); in i40e_init_asq()
427 static i40e_status i40e_init_arq(struct i40e_hw *hw) in i40e_init_arq() argument
431 if (hw->aq.arq.count > 0) { in i40e_init_arq()
438 if ((hw->aq.num_arq_entries == 0) || in i40e_init_arq()
439 (hw->aq.arq_buf_size == 0)) { in i40e_init_arq()
444 hw->aq.arq.next_to_use = 0; in i40e_init_arq()
445 hw->aq.arq.next_to_clean = 0; in i40e_init_arq()
446 hw->aq.arq.count = hw->aq.num_arq_entries; in i40e_init_arq()
449 ret_code = i40e_alloc_adminq_arq_ring(hw); in i40e_init_arq()
454 ret_code = i40e_alloc_arq_bufs(hw); in i40e_init_arq()
459 ret_code = i40e_config_arq_regs(hw); in i40e_init_arq()
467 i40e_free_adminq_arq(hw); in i40e_init_arq()
479 static i40e_status i40e_shutdown_asq(struct i40e_hw *hw) in i40e_shutdown_asq() argument
483 if (hw->aq.asq.count == 0) in i40e_shutdown_asq()
487 wr32(hw, hw->aq.asq.head, 0); in i40e_shutdown_asq()
488 wr32(hw, hw->aq.asq.tail, 0); in i40e_shutdown_asq()
489 wr32(hw, hw->aq.asq.len, 0); in i40e_shutdown_asq()
490 wr32(hw, hw->aq.asq.bal, 0); in i40e_shutdown_asq()
491 wr32(hw, hw->aq.asq.bah, 0); in i40e_shutdown_asq()
494 mutex_lock(&hw->aq.asq_mutex); in i40e_shutdown_asq()
496 hw->aq.asq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_asq()
499 i40e_free_asq_bufs(hw); in i40e_shutdown_asq()
501 mutex_unlock(&hw->aq.asq_mutex); in i40e_shutdown_asq()
512 static i40e_status i40e_shutdown_arq(struct i40e_hw *hw) in i40e_shutdown_arq() argument
516 if (hw->aq.arq.count == 0) in i40e_shutdown_arq()
520 wr32(hw, hw->aq.arq.head, 0); in i40e_shutdown_arq()
521 wr32(hw, hw->aq.arq.tail, 0); in i40e_shutdown_arq()
522 wr32(hw, hw->aq.arq.len, 0); in i40e_shutdown_arq()
523 wr32(hw, hw->aq.arq.bal, 0); in i40e_shutdown_arq()
524 wr32(hw, hw->aq.arq.bah, 0); in i40e_shutdown_arq()
527 mutex_lock(&hw->aq.arq_mutex); in i40e_shutdown_arq()
529 hw->aq.arq.count = 0; /* to indicate uninitialized queue */ in i40e_shutdown_arq()
532 i40e_free_arq_bufs(hw); in i40e_shutdown_arq()
534 mutex_unlock(&hw->aq.arq_mutex); in i40e_shutdown_arq()
550 i40e_status i40evf_init_adminq(struct i40e_hw *hw) in i40evf_init_adminq() argument
555 if ((hw->aq.num_arq_entries == 0) || in i40evf_init_adminq()
556 (hw->aq.num_asq_entries == 0) || in i40evf_init_adminq()
557 (hw->aq.arq_buf_size == 0) || in i40evf_init_adminq()
558 (hw->aq.asq_buf_size == 0)) { in i40evf_init_adminq()
564 mutex_init(&hw->aq.asq_mutex); in i40evf_init_adminq()
565 mutex_init(&hw->aq.arq_mutex); in i40evf_init_adminq()
568 i40e_adminq_init_regs(hw); in i40evf_init_adminq()
571 hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT; in i40evf_init_adminq()
574 ret_code = i40e_init_asq(hw); in i40evf_init_adminq()
579 ret_code = i40e_init_arq(hw); in i40evf_init_adminq()
587 i40e_shutdown_asq(hw); in i40evf_init_adminq()
598 i40e_status i40evf_shutdown_adminq(struct i40e_hw *hw) in i40evf_shutdown_adminq() argument
602 if (i40evf_check_asq_alive(hw)) in i40evf_shutdown_adminq()
603 i40evf_aq_queue_shutdown(hw, true); in i40evf_shutdown_adminq()
605 i40e_shutdown_asq(hw); in i40evf_shutdown_adminq()
606 i40e_shutdown_arq(hw); in i40evf_shutdown_adminq()
619 static u16 i40e_clean_asq(struct i40e_hw *hw) in i40e_clean_asq() argument
621 struct i40e_adminq_ring *asq = &(hw->aq.asq); in i40e_clean_asq()
629 while (rd32(hw, hw->aq.asq.head) != ntc) { in i40e_clean_asq()
630 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40e_clean_asq()
632 rd32(hw, hw->aq.asq.head)); in i40e_clean_asq()
638 cb_func(hw, &desc_cb); in i40e_clean_asq()
662 bool i40evf_asq_done(struct i40e_hw *hw) in i40evf_asq_done() argument
667 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in i40evf_asq_done()
682 i40e_status i40evf_asq_send_command(struct i40e_hw *hw, in i40evf_asq_send_command() argument
696 val = rd32(hw, hw->aq.asq.head); in i40evf_asq_send_command()
697 if (val >= hw->aq.num_asq_entries) { in i40evf_asq_send_command()
698 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40evf_asq_send_command()
704 if (hw->aq.asq.count == 0) { in i40evf_asq_send_command()
705 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40evf_asq_send_command()
711 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); in i40evf_asq_send_command()
733 mutex_lock(&hw->aq.asq_mutex); in i40evf_asq_send_command()
735 if (buff_size > hw->aq.asq_buf_size) { in i40evf_asq_send_command()
736 i40e_debug(hw, in i40evf_asq_send_command()
745 i40e_debug(hw, in i40evf_asq_send_command()
759 if (i40e_clean_asq(hw) == 0) { in i40evf_asq_send_command()
760 i40e_debug(hw, in i40evf_asq_send_command()
768 desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); in i40evf_asq_send_command()
775 dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]); in i40evf_asq_send_command()
790 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, "AQTX: desc and buffer:\n"); in i40evf_asq_send_command()
791 i40evf_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc_on_ring, in i40evf_asq_send_command()
793 (hw->aq.asq.next_to_use)++; in i40evf_asq_send_command()
794 if (hw->aq.asq.next_to_use == hw->aq.asq.count) in i40evf_asq_send_command()
795 hw->aq.asq.next_to_use = 0; in i40evf_asq_send_command()
797 wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); in i40evf_asq_send_command()
809 if (i40evf_asq_done(hw)) in i40evf_asq_send_command()
813 } while (total_delay < hw->aq.asq_cmd_timeout); in i40evf_asq_send_command()
817 if (i40evf_asq_done(hw)) { in i40evf_asq_send_command()
823 i40e_debug(hw, in i40evf_asq_send_command()
836 hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval; in i40evf_asq_send_command()
839 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, in i40evf_asq_send_command()
841 i40evf_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, in i40evf_asq_send_command()
847 i40e_debug(hw, in i40evf_asq_send_command()
854 mutex_unlock(&hw->aq.asq_mutex); in i40evf_asq_send_command()
885 i40e_status i40evf_clean_arq_element(struct i40e_hw *hw, in i40evf_clean_arq_element() argument
890 u16 ntc = hw->aq.arq.next_to_clean; in i40evf_clean_arq_element()
899 mutex_lock(&hw->aq.arq_mutex); in i40evf_clean_arq_element()
902 ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK); in i40evf_clean_arq_element()
910 desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc); in i40evf_clean_arq_element()
916 hw->aq.arq_last_status = in i40evf_clean_arq_element()
918 i40e_debug(hw, in i40evf_clean_arq_element()
921 hw->aq.arq_last_status); in i40evf_clean_arq_element()
928 memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va, in i40evf_clean_arq_element()
931 i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, "AQRX: desc and buffer:\n"); in i40evf_clean_arq_element()
932 i40evf_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, e->msg_buf, in i40evf_clean_arq_element()
933 hw->aq.arq_buf_size); in i40evf_clean_arq_element()
939 bi = &hw->aq.arq.r.arq_bi[ntc]; in i40evf_clean_arq_element()
943 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) in i40evf_clean_arq_element()
950 wr32(hw, hw->aq.arq.tail, ntc); in i40evf_clean_arq_element()
953 if (ntc == hw->aq.num_arq_entries) in i40evf_clean_arq_element()
955 hw->aq.arq.next_to_clean = ntc; in i40evf_clean_arq_element()
956 hw->aq.arq.next_to_use = ntu; in i40evf_clean_arq_element()
961 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); in i40evf_clean_arq_element()
962 mutex_unlock(&hw->aq.arq_mutex); in i40evf_clean_arq_element()
967 void i40evf_resume_aq(struct i40e_hw *hw) in i40evf_resume_aq() argument
970 hw->aq.asq.next_to_use = 0; in i40evf_resume_aq()
971 hw->aq.asq.next_to_clean = 0; in i40evf_resume_aq()
973 i40e_config_asq_regs(hw); in i40evf_resume_aq()
975 hw->aq.arq.next_to_use = 0; in i40evf_resume_aq()
976 hw->aq.arq.next_to_clean = 0; in i40evf_resume_aq()
978 i40e_config_arq_regs(hw); in i40evf_resume_aq()