3196 				struct i40e_filter_control_settings *settings)  in i40e_validate_filter_settings()  argument
3204 	switch (settings->fcoe_filt_num) {  in i40e_validate_filter_settings()
3212 		fcoe_filt_size <<= (u32)settings->fcoe_filt_num;  in i40e_validate_filter_settings()
3218 	switch (settings->fcoe_cntx_num) {  in i40e_validate_filter_settings()
3224 		fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;  in i40e_validate_filter_settings()
3231 	switch (settings->pe_filt_num) {  in i40e_validate_filter_settings()
3244 		pe_filt_size <<= (u32)settings->pe_filt_num;  in i40e_validate_filter_settings()
3250 	switch (settings->pe_cntx_num) {  in i40e_validate_filter_settings()
3262 		pe_cntx_size <<= (u32)settings->pe_cntx_num;  in i40e_validate_filter_settings()
3288 				struct i40e_filter_control_settings *settings)  in i40e_set_filter_control()  argument
3294 	if (!settings)  in i40e_set_filter_control()
3298 	ret = i40e_validate_filter_settings(hw, settings);  in i40e_set_filter_control()
3307 	val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &  in i40e_set_filter_control()
3311 	val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &  in i40e_set_filter_control()
3316 	val |= ((u32)settings->fcoe_filt_num <<  in i40e_set_filter_control()
3321 	val |= ((u32)settings->fcoe_cntx_num <<  in i40e_set_filter_control()
3327 	if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)  in i40e_set_filter_control()
3333 	if (settings->enable_fdir)  in i40e_set_filter_control()
3335 	if (settings->enable_ethtype)  in i40e_set_filter_control()
3337 	if (settings->enable_macvlan)  in i40e_set_filter_control()