Lines Matching refs:rd32
148 return !!(rd32(hw, hw->aq.asq.len) & in i40e_check_asq_alive()
574 port = (rd32(hw, I40E_PFGEN_PORTNUM) & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) in i40e_init_shared_code()
577 ari = (rd32(hw, I40E_GLPCI_CAPSUP) & I40E_GLPCI_CAPSUP_ARI_EN_MASK) >> in i40e_init_shared_code()
579 func_rid = rd32(hw, I40E_PF_FUNC_RID); in i40e_init_shared_code()
712 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg()
881 grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) & in i40e_pf_reset()
885 reg = rd32(hw, I40E_GLGEN_RSTAT); in i40e_pf_reset()
897 reg = rd32(hw, I40E_GLNVM_ULD); in i40e_pf_reset()
922 reg = rd32(hw, I40E_PFGEN_CTRL); in i40e_pf_reset()
926 reg = rd32(hw, I40E_PFGEN_CTRL); in i40e_pf_reset()
961 val = rd32(hw, I40E_GLPCI_CNF2); in i40e_clear_hw()
967 val = rd32(hw, I40E_PFLAN_QALLOC); in i40e_clear_hw()
977 val = rd32(hw, I40E_PF_VT_PFALLOC); in i40e_clear_hw()
1014 val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_clear_hw()
1050 reg = rd32(hw, I40E_GLLAN_RCTL_0); in i40e_clear_pxe_mode()
1075 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(idx)); in i40e_led_is_mine()
3269 val = rd32(hw, I40E_GLHMC_FCOEFMAX); in i40e_validate_filter_settings()
3303 val = rd32(hw, I40E_PFQF_CTL_0); in i40e_set_filter_control()