31 static s32 fm10k_reset_hw_pf(struct fm10k_hw *hw)  in fm10k_reset_hw_pf()  argument
38 	fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_DISABLE(ALL));  in fm10k_reset_hw_pf()
41 	fm10k_write_reg(hw, FM10K_ITR2(0), 0);  in fm10k_reset_hw_pf()
42 	fm10k_write_reg(hw, FM10K_INT_CTRL, 0);  in fm10k_reset_hw_pf()
48 		fm10k_write_reg(hw, FM10K_TQMAP(i), 0);  in fm10k_reset_hw_pf()
49 		fm10k_write_reg(hw, FM10K_RQMAP(i), 0);  in fm10k_reset_hw_pf()
53 	err = fm10k_disable_queues_generic(hw, FM10K_MAX_QUEUES);  in fm10k_reset_hw_pf()
58 	reg = fm10k_read_reg(hw, FM10K_DMA_CTRL);  in fm10k_reset_hw_pf()
64 	fm10k_write_reg(hw, FM10K_DMA_CTRL, reg);  in fm10k_reset_hw_pf()
67 	fm10k_write_flush(hw);  in fm10k_reset_hw_pf()
71 	reg = fm10k_read_reg(hw, FM10K_IP);  in fm10k_reset_hw_pf()
84 static bool fm10k_is_ari_hierarchy_pf(struct fm10k_hw *hw)  in fm10k_is_ari_hierarchy_pf()  argument
86 	u16 sriov_ctrl = fm10k_read_pci_cfg_word(hw, FM10K_PCIE_SRIOV_CTRL);  in fm10k_is_ari_hierarchy_pf()
96 static s32 fm10k_init_hw_pf(struct fm10k_hw *hw)  in fm10k_init_hw_pf()  argument
102 	fm10k_write_reg(hw, FM10K_DGLORTDEC(fm10k_dglort_default), 0);  in fm10k_init_hw_pf()
103 	fm10k_write_reg(hw, FM10K_DGLORTMAP(fm10k_dglort_default),  in fm10k_init_hw_pf()
108 		fm10k_write_reg(hw, FM10K_DGLORTMAP(i), FM10K_DGLORTMAP_NONE);  in fm10k_init_hw_pf()
111 	fm10k_write_reg(hw, FM10K_ITR2(0), 0);  in fm10k_init_hw_pf()
114 	fm10k_write_reg(hw, FM10K_ITR2(FM10K_ITR_REG_COUNT_PF), 0);  in fm10k_init_hw_pf()
118 		fm10k_write_reg(hw, FM10K_ITR2(i), i - 1);  in fm10k_init_hw_pf()
121 	fm10k_write_reg(hw, FM10K_INT_CTRL, FM10K_INT_CTRL_ENABLEMODERATOR);  in fm10k_init_hw_pf()
125 		 (hw->mac.default_vid << FM10K_TXQCTL_VID_SHIFT);  in fm10k_init_hw_pf()
129 		fm10k_write_reg(hw, FM10K_TQDLOC(i),  in fm10k_init_hw_pf()
132 		fm10k_write_reg(hw, FM10K_TXQCTL(i), txqctl);  in fm10k_init_hw_pf()
135 		fm10k_write_reg(hw, FM10K_TPH_TXCTRL(i),  in fm10k_init_hw_pf()
140 		fm10k_write_reg(hw, FM10K_TPH_RXCTRL(i),  in fm10k_init_hw_pf()
148 	switch (hw->bus.speed) {  in fm10k_init_hw_pf()
164 	fm10k_write_reg(hw, FM10K_DTXTCPFLGL, FM10K_TSO_FLAGS_LOW);  in fm10k_init_hw_pf()
165 	fm10k_write_reg(hw, FM10K_DTXTCPFLGH, FM10K_TSO_FLAGS_HI);  in fm10k_init_hw_pf()
176 	fm10k_write_reg(hw, FM10K_DMA_CTRL, dma_ctrl);  in fm10k_init_hw_pf()
179 	hw->mac.max_queues = FM10K_MAX_QUEUES_PF;  in fm10k_init_hw_pf()
182 	hw->iov.total_vfs = fm10k_is_ari_hierarchy_pf(hw) ? 64 : 7;  in fm10k_init_hw_pf()
194 static bool fm10k_is_slot_appropriate_pf(struct fm10k_hw *hw)  in fm10k_is_slot_appropriate_pf()  argument
196 	return (hw->bus.speed == hw->bus_caps.speed) &&  in fm10k_is_slot_appropriate_pf()
197 	       (hw->bus.width == hw->bus_caps.width);  in fm10k_is_slot_appropriate_pf()
212 static s32 fm10k_update_vlan_pf(struct fm10k_hw *hw, u32 vid, u8 vsi, bool set)  in fm10k_update_vlan_pf()  argument
245 		vlan_table = fm10k_read_reg(hw, reg);  in fm10k_update_vlan_pf()
253 			fm10k_write_reg(hw, reg, vlan_table ^ mask);  in fm10k_update_vlan_pf()
265 static s32 fm10k_read_mac_addr_pf(struct fm10k_hw *hw)  in fm10k_read_mac_addr_pf()  argument
271 	serial_num = fm10k_read_reg(hw, FM10K_SM_AREA(1));  in fm10k_read_mac_addr_pf()
281 	serial_num = fm10k_read_reg(hw, FM10K_SM_AREA(0));  in fm10k_read_mac_addr_pf()
292 		hw->mac.perm_addr[i] = perm_addr[i];  in fm10k_read_mac_addr_pf()
293 		hw->mac.addr[i] = perm_addr[i];  in fm10k_read_mac_addr_pf()
306 bool fm10k_glort_valid_pf(struct fm10k_hw *hw, u16 glort)  in fm10k_glort_valid_pf()  argument
308 	glort &= hw->mac.dglort_map >> FM10K_DGLORTMAP_MASK_SHIFT;  in fm10k_glort_valid_pf()
310 	return glort == (hw->mac.dglort_map & FM10K_DGLORTMAP_NONE);  in fm10k_glort_valid_pf()
325 static s32 fm10k_update_xc_addr_pf(struct fm10k_hw *hw, u16 glort,  in fm10k_update_xc_addr_pf()  argument
328 	struct fm10k_mbx_info *mbx = &hw->mbx;  in fm10k_update_xc_addr_pf()
336 	if (!fm10k_glort_valid_pf(hw, glort) || vid >= FM10K_VLAN_TABLE_VID_MAX)  in fm10k_update_xc_addr_pf()
357 	return mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_update_xc_addr_pf()
372 static s32 fm10k_update_uc_addr_pf(struct fm10k_hw *hw, u16 glort,  in fm10k_update_uc_addr_pf()  argument
379 	return fm10k_update_xc_addr_pf(hw, glort, mac, vid, add, flags);  in fm10k_update_uc_addr_pf()
393 static s32 fm10k_update_mc_addr_pf(struct fm10k_hw *hw, u16 glort,  in fm10k_update_mc_addr_pf()  argument
400 	return fm10k_update_xc_addr_pf(hw, glort, mac, vid, add, 0);  in fm10k_update_mc_addr_pf()
413 static s32 fm10k_update_xcast_mode_pf(struct fm10k_hw *hw, u16 glort, u8 mode)  in fm10k_update_xcast_mode_pf()  argument
415 	struct fm10k_mbx_info *mbx = &hw->mbx;  in fm10k_update_xcast_mode_pf()
421 	if (!fm10k_glort_valid_pf(hw, glort))  in fm10k_update_xcast_mode_pf()
435 	return mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_update_xcast_mode_pf()
446 static void fm10k_update_int_moderator_pf(struct fm10k_hw *hw)  in fm10k_update_int_moderator_pf()  argument
451 	fm10k_write_reg(hw, FM10K_INT_CTRL, 0);  in fm10k_update_int_moderator_pf()
455 		if (!fm10k_read_reg(hw, FM10K_MSIX_VECTOR_MASK(i)))  in fm10k_update_int_moderator_pf()
460 	fm10k_write_reg(hw, FM10K_ITR2(FM10K_ITR_REG_COUNT_PF), i);  in fm10k_update_int_moderator_pf()
463 	if (!hw->iov.num_vfs)  in fm10k_update_int_moderator_pf()
464 		fm10k_write_reg(hw, FM10K_ITR2(0), i);  in fm10k_update_int_moderator_pf()
467 	fm10k_write_reg(hw, FM10K_INT_CTRL, FM10K_INT_CTRL_ENABLEMODERATOR);  in fm10k_update_int_moderator_pf()
479 static s32 fm10k_update_lport_state_pf(struct fm10k_hw *hw, u16 glort,  in fm10k_update_lport_state_pf()  argument
482 	struct fm10k_mbx_info *mbx = &hw->mbx;  in fm10k_update_lport_state_pf()
490 	if (!fm10k_glort_valid_pf(hw, glort))  in fm10k_update_lport_state_pf()
502 	return mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_update_lport_state_pf()
514 static s32 fm10k_configure_dglort_map_pf(struct fm10k_hw *hw,  in fm10k_configure_dglort_map_pf()  argument
543 			fm10k_write_reg(hw, FM10K_TX_SGLORT(q_idx), glort);  in fm10k_configure_dglort_map_pf()
544 			fm10k_write_reg(hw, FM10K_RX_SGLORT(q_idx), glort);  in fm10k_configure_dglort_map_pf()
559 			txqctl = fm10k_read_reg(hw, FM10K_TXQCTL(q_idx));  in fm10k_configure_dglort_map_pf()
562 			fm10k_write_reg(hw, FM10K_TXQCTL(q_idx), txqctl);  in fm10k_configure_dglort_map_pf()
585 	fm10k_write_reg(hw, FM10K_DGLORTDEC(dglort->idx), dglortdec);  in fm10k_configure_dglort_map_pf()
586 	fm10k_write_reg(hw, FM10K_DGLORTMAP(dglort->idx), dglortmap);  in fm10k_configure_dglort_map_pf()
591 u16 fm10k_queues_per_pool(struct fm10k_hw *hw)  in fm10k_queues_per_pool()  argument
593 	u16 num_pools = hw->iov.num_pools;  in fm10k_queues_per_pool()
599 u16 fm10k_vf_queue_index(struct fm10k_hw *hw, u16 vf_idx)  in fm10k_vf_queue_index()  argument
601 	u16 num_vfs = hw->iov.num_vfs;  in fm10k_vf_queue_index()
604 	vf_q_idx -= fm10k_queues_per_pool(hw) * (num_vfs - vf_idx);  in fm10k_vf_queue_index()
609 static u16 fm10k_vectors_per_pool(struct fm10k_hw *hw)  in fm10k_vectors_per_pool()  argument
611 	u16 num_pools = hw->iov.num_pools;  in fm10k_vectors_per_pool()
617 static u16 fm10k_vf_vector_index(struct fm10k_hw *hw, u16 vf_idx)  in fm10k_vf_vector_index()  argument
621 	vf_v_idx += fm10k_vectors_per_pool(hw) * vf_idx;  in fm10k_vf_vector_index()
635 static s32 fm10k_iov_assign_resources_pf(struct fm10k_hw *hw, u16 num_vfs,  in fm10k_iov_assign_resources_pf()  argument
639 	u32 vid = hw->mac.default_vid << FM10K_TXQCTL_VID_SHIFT;  in fm10k_iov_assign_resources_pf()
647 	if ((num_vfs > num_pools) || (num_vfs > hw->iov.total_vfs))  in fm10k_iov_assign_resources_pf()
651 	hw->iov.num_vfs = num_vfs;  in fm10k_iov_assign_resources_pf()
652 	hw->iov.num_pools = num_pools;  in fm10k_iov_assign_resources_pf()
656 	qpp = fm10k_queues_per_pool(hw);  in fm10k_iov_assign_resources_pf()
657 	vpp = fm10k_vectors_per_pool(hw);  in fm10k_iov_assign_resources_pf()
660 	vf_q_idx = fm10k_vf_queue_index(hw, 0);  in fm10k_iov_assign_resources_pf()
665 		fm10k_write_reg(hw, FM10K_TC_MAXCREDIT(i), 0);  in fm10k_iov_assign_resources_pf()
666 		fm10k_write_reg(hw, FM10K_TC_RATE(i), 0);  in fm10k_iov_assign_resources_pf()
667 		fm10k_write_reg(hw, FM10K_TC_CREDIT(i),  in fm10k_iov_assign_resources_pf()
673 		fm10k_write_reg(hw, FM10K_MBMEM(i), 0);  in fm10k_iov_assign_resources_pf()
676 	fm10k_write_reg(hw, FM10K_PFVFLREC(0), ~0);  in fm10k_iov_assign_resources_pf()
677 	fm10k_write_reg(hw, FM10K_PFVFLREC(1), ~0);  in fm10k_iov_assign_resources_pf()
681 		fm10k_write_reg(hw, FM10K_TXDCTL(i), 0);  in fm10k_iov_assign_resources_pf()
682 		fm10k_write_reg(hw, FM10K_TXQCTL(i), FM10K_TXQCTL_PF |  in fm10k_iov_assign_resources_pf()
684 		fm10k_write_reg(hw, FM10K_RXQCTL(i), FM10K_RXQCTL_PF);  in fm10k_iov_assign_resources_pf()
692 			fm10k_write_reg(hw, FM10K_ITR2(i), i - vpp);  in fm10k_iov_assign_resources_pf()
694 			fm10k_write_reg(hw, FM10K_ITR2(i), i - 1);  in fm10k_iov_assign_resources_pf()
698 	fm10k_write_reg(hw, FM10K_ITR2(0),  in fm10k_iov_assign_resources_pf()
699 			fm10k_vf_vector_index(hw, num_vfs - 1));  in fm10k_iov_assign_resources_pf()
708 			fm10k_write_reg(hw, FM10K_TXDCTL(vf_q_idx), 0);  in fm10k_iov_assign_resources_pf()
709 			fm10k_write_reg(hw, FM10K_TXQCTL(vf_q_idx),  in fm10k_iov_assign_resources_pf()
712 			fm10k_write_reg(hw, FM10K_RXDCTL(vf_q_idx),  in fm10k_iov_assign_resources_pf()
715 			fm10k_write_reg(hw, FM10K_RXQCTL(vf_q_idx),  in fm10k_iov_assign_resources_pf()
720 			fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), vf_q_idx);  in fm10k_iov_assign_resources_pf()
721 			fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx), vf_q_idx);  in fm10k_iov_assign_resources_pf()
726 			fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), vf_q_idx0);  in fm10k_iov_assign_resources_pf()
727 			fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx), vf_q_idx0);  in fm10k_iov_assign_resources_pf()
733 		fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), 0);  in fm10k_iov_assign_resources_pf()
734 		fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx), 0);  in fm10k_iov_assign_resources_pf()
750 static s32 fm10k_iov_configure_tc_pf(struct fm10k_hw *hw, u16 vf_idx, int rate)  in fm10k_iov_configure_tc_pf()  argument
757 	if (vf_idx >= hw->iov.num_vfs)  in fm10k_iov_configure_tc_pf()
761 	switch (hw->bus.speed) {  in fm10k_iov_configure_tc_pf()
795 	fm10k_write_reg(hw, FM10K_TC_RATE(vf_idx), tc_rate | interval);  in fm10k_iov_configure_tc_pf()
796 	fm10k_write_reg(hw, FM10K_TC_MAXCREDIT(vf_idx), FM10K_TC_MAXCREDIT_64K);  in fm10k_iov_configure_tc_pf()
797 	fm10k_write_reg(hw, FM10K_TC_CREDIT(vf_idx), FM10K_TC_MAXCREDIT_64K);  in fm10k_iov_configure_tc_pf()
810 static s32 fm10k_iov_assign_int_moderator_pf(struct fm10k_hw *hw, u16 vf_idx)  in fm10k_iov_assign_int_moderator_pf()  argument
815 	if (vf_idx >= hw->iov.num_vfs)  in fm10k_iov_assign_int_moderator_pf()
819 	vf_v_idx = fm10k_vf_vector_index(hw, vf_idx);  in fm10k_iov_assign_int_moderator_pf()
820 	vf_v_limit = vf_v_idx + fm10k_vectors_per_pool(hw);  in fm10k_iov_assign_int_moderator_pf()
824 		if (!fm10k_read_reg(hw, FM10K_MSIX_VECTOR_MASK(i)))  in fm10k_iov_assign_int_moderator_pf()
829 	if (vf_idx == (hw->iov.num_vfs - 1))  in fm10k_iov_assign_int_moderator_pf()
830 		fm10k_write_reg(hw, FM10K_ITR2(0), i);  in fm10k_iov_assign_int_moderator_pf()
832 		fm10k_write_reg(hw, FM10K_ITR2(vf_v_limit), i);  in fm10k_iov_assign_int_moderator_pf()
844 static s32 fm10k_iov_assign_default_mac_vlan_pf(struct fm10k_hw *hw,  in fm10k_iov_assign_default_mac_vlan_pf()  argument
853 	if (!vf_info || vf_info->vf_idx >= hw->iov.num_vfs)  in fm10k_iov_assign_default_mac_vlan_pf()
857 	qmap_stride = (hw->iov.num_vfs > 8) ? 32 : 256;  in fm10k_iov_assign_default_mac_vlan_pf()
858 	queues_per_pool = fm10k_queues_per_pool(hw);  in fm10k_iov_assign_default_mac_vlan_pf()
862 	vf_q_idx = fm10k_vf_queue_index(hw, vf_idx);  in fm10k_iov_assign_default_mac_vlan_pf()
866 	fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), 0);  in fm10k_iov_assign_default_mac_vlan_pf()
867 	fm10k_write_reg(hw, FM10K_TXDCTL(vf_q_idx), 0);  in fm10k_iov_assign_default_mac_vlan_pf()
882 		vf_info->mbx.ops.enqueue_tx(hw, &vf_info->mbx, msg);  in fm10k_iov_assign_default_mac_vlan_pf()
885 	txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx));  in fm10k_iov_assign_default_mac_vlan_pf()
894 		txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx));  in fm10k_iov_assign_default_mac_vlan_pf()
910 	fm10k_write_reg(hw, FM10K_TDBAL(vf_q_idx), tdbal);  in fm10k_iov_assign_default_mac_vlan_pf()
911 	fm10k_write_reg(hw, FM10K_TDBAH(vf_q_idx), tdbah);  in fm10k_iov_assign_default_mac_vlan_pf()
922 		fm10k_write_reg(hw, FM10K_TXQCTL(vf_q_idx + i), txqctl);  in fm10k_iov_assign_default_mac_vlan_pf()
925 	fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), vf_q_idx);  in fm10k_iov_assign_default_mac_vlan_pf()
936 static s32 fm10k_iov_reset_resources_pf(struct fm10k_hw *hw,  in fm10k_iov_reset_resources_pf()  argument
946 	if (vf_idx >= hw->iov.num_vfs)  in fm10k_iov_reset_resources_pf()
950 	fm10k_write_reg(hw, FM10K_PFVFLREC(vf_idx / 32), 1 << (vf_idx % 32));  in fm10k_iov_reset_resources_pf()
955 		vf_info->mbx.ops.disconnect(hw, &vf_info->mbx);  in fm10k_iov_reset_resources_pf()
958 	vf_v_idx = fm10k_vf_vector_index(hw, vf_idx);  in fm10k_iov_reset_resources_pf()
959 	vf_v_limit = vf_v_idx + fm10k_vectors_per_pool(hw);  in fm10k_iov_reset_resources_pf()
962 	qmap_stride = (hw->iov.num_vfs > 8) ? 32 : 256;  in fm10k_iov_reset_resources_pf()
963 	queues_per_pool = fm10k_queues_per_pool(hw);  in fm10k_iov_reset_resources_pf()
968 		fm10k_write_reg(hw, FM10K_TQMAP(i), 0);  in fm10k_iov_reset_resources_pf()
969 		fm10k_write_reg(hw, FM10K_RQMAP(i), 0);  in fm10k_iov_reset_resources_pf()
973 	vf_q_idx = fm10k_vf_queue_index(hw, vf_idx);  in fm10k_iov_reset_resources_pf()
989 		fm10k_write_reg(hw, FM10K_TXDCTL(i), 0);  in fm10k_iov_reset_resources_pf()
990 		fm10k_write_reg(hw, FM10K_TXQCTL(i), txqctl);  in fm10k_iov_reset_resources_pf()
991 		fm10k_write_reg(hw, FM10K_RXDCTL(i),  in fm10k_iov_reset_resources_pf()
994 		fm10k_write_reg(hw, FM10K_RXQCTL(i), rxqctl);  in fm10k_iov_reset_resources_pf()
998 	fm10k_write_reg(hw, FM10K_TC_MAXCREDIT(vf_idx), 0);  in fm10k_iov_reset_resources_pf()
999 	fm10k_write_reg(hw, FM10K_TC_RATE(vf_idx), 0);  in fm10k_iov_reset_resources_pf()
1000 	fm10k_write_reg(hw, FM10K_TC_CREDIT(vf_idx),  in fm10k_iov_reset_resources_pf()
1005 		hw->mac.ops.update_int_moderator(hw);  in fm10k_iov_reset_resources_pf()
1007 		hw->iov.ops.assign_int_moderator(hw, vf_idx - 1);  in fm10k_iov_reset_resources_pf()
1010 	if (vf_idx == (hw->iov.num_vfs - 1))  in fm10k_iov_reset_resources_pf()
1011 		fm10k_write_reg(hw, FM10K_ITR2(0), vf_v_idx);  in fm10k_iov_reset_resources_pf()
1013 		fm10k_write_reg(hw, FM10K_ITR2(vf_v_limit), vf_v_idx);  in fm10k_iov_reset_resources_pf()
1017 		fm10k_write_reg(hw, FM10K_ITR2(vf_v_idx), vf_v_idx - 1);  in fm10k_iov_reset_resources_pf()
1021 		fm10k_write_reg(hw, FM10K_MBMEM_VF(vf_idx, i), 0);  in fm10k_iov_reset_resources_pf()
1023 		fm10k_write_reg(hw, FM10K_VLAN_TABLE(vf_info->vsi, i), 0);  in fm10k_iov_reset_resources_pf()
1025 		fm10k_write_reg(hw, FM10K_RETA(vf_info->vsi, i), 0);  in fm10k_iov_reset_resources_pf()
1027 		fm10k_write_reg(hw, FM10K_RSSRK(vf_info->vsi, i), 0);  in fm10k_iov_reset_resources_pf()
1028 	fm10k_write_reg(hw, FM10K_MRQC(vf_info->vsi), 0);  in fm10k_iov_reset_resources_pf()
1043 		fm10k_write_reg(hw, FM10K_TDBAL(vf_q_idx + i), tdbal);  in fm10k_iov_reset_resources_pf()
1044 		fm10k_write_reg(hw, FM10K_TDBAH(vf_q_idx + i), tdbah);  in fm10k_iov_reset_resources_pf()
1045 		fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx + i), vf_q_idx + i);  in fm10k_iov_reset_resources_pf()
1046 		fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx + i), vf_q_idx + i);  in fm10k_iov_reset_resources_pf()
1062 static s32 fm10k_iov_set_lport_pf(struct fm10k_hw *hw,  in fm10k_iov_set_lport_pf()  argument
1066 	u16 glort = (hw->mac.dglort_map + lport_idx) & FM10K_DGLORTMAP_NONE;  in fm10k_iov_set_lport_pf()
1069 	if (!fm10k_glort_valid_pf(hw, glort))  in fm10k_iov_set_lport_pf()
1086 static void fm10k_iov_reset_lport_pf(struct fm10k_hw *hw,  in fm10k_iov_reset_lport_pf()  argument
1094 		fm10k_update_lport_state_pf(hw, vf_info->glort, 1, false);  in fm10k_iov_reset_lport_pf()
1098 		vf_info->mbx.ops.enqueue_tx(hw, &vf_info->mbx, msg);  in fm10k_iov_reset_lport_pf()
1114 static void fm10k_iov_update_stats_pf(struct fm10k_hw *hw,  in fm10k_iov_update_stats_pf()  argument
1121 	qpp = fm10k_queues_per_pool(hw);  in fm10k_iov_update_stats_pf()
1122 	idx = fm10k_vf_queue_index(hw, vf_idx);  in fm10k_iov_update_stats_pf()
1123 	fm10k_update_hw_stats_q(hw, q, idx, qpp);  in fm10k_iov_update_stats_pf()
1126 static s32 fm10k_iov_report_timestamp_pf(struct fm10k_hw *hw,  in fm10k_iov_report_timestamp_pf()  argument
1136 	return vf_info->mbx.ops.enqueue_tx(hw, &vf_info->mbx, msg);  in fm10k_iov_report_timestamp_pf()
1149 s32 fm10k_iov_msg_msix_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_iov_msg_msix_pf()  argument
1155 	return hw->iov.ops.assign_int_moderator(hw, vf_idx);  in fm10k_iov_msg_msix_pf()
1168 s32 fm10k_iov_msg_mac_vlan_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_iov_msg_mac_vlan_pf()  argument
1201 		err = hw->mac.ops.update_vlan(hw, vid, vf_info->vsi,  in fm10k_iov_msg_mac_vlan_pf()
1229 		err = hw->mac.ops.update_uc_addr(hw, vf_info->glort, mac, vlan,  in fm10k_iov_msg_mac_vlan_pf()
1256 		err = hw->mac.ops.update_mc_addr(hw, vf_info->glort, mac, vlan,  in fm10k_iov_msg_mac_vlan_pf()
1312 s32 fm10k_iov_msg_lport_state_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_iov_msg_lport_state_pf()  argument
1338 			fm10k_update_xcast_mode_pf(hw, vf_info->glort, mode);  in fm10k_iov_msg_lport_state_pf()
1345 			err = fm10k_update_lport_state_pf(hw, vf_info->glort,  in fm10k_iov_msg_lport_state_pf()
1349 		hw->iov.ops.configure_tc(hw, vf_info->vf_idx, vf_info->rate);  in fm10k_iov_msg_lport_state_pf()
1357 		mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_iov_msg_lport_state_pf()
1362 		err = fm10k_update_lport_state_pf(hw, vf_info->glort, 1,  in fm10k_iov_msg_lport_state_pf()
1389 static void fm10k_update_hw_stats_pf(struct fm10k_hw *hw,  in fm10k_update_hw_stats_pf()  argument
1396 	id = fm10k_read_reg(hw, FM10K_TXQCTL(0));  in fm10k_update_hw_stats_pf()
1400 		timeout = fm10k_read_hw_stats_32b(hw, FM10K_STATS_TIMEOUT,  in fm10k_update_hw_stats_pf()
1402 		ur = fm10k_read_hw_stats_32b(hw, FM10K_STATS_UR, &stats->ur);  in fm10k_update_hw_stats_pf()
1403 		ca = fm10k_read_hw_stats_32b(hw, FM10K_STATS_CA, &stats->ca);  in fm10k_update_hw_stats_pf()
1404 		um = fm10k_read_hw_stats_32b(hw, FM10K_STATS_UM, &stats->um);  in fm10k_update_hw_stats_pf()
1405 		xec = fm10k_read_hw_stats_32b(hw, FM10K_STATS_XEC, &stats->xec);  in fm10k_update_hw_stats_pf()
1406 		vlan_drop = fm10k_read_hw_stats_32b(hw, FM10K_STATS_VLAN_DROP,  in fm10k_update_hw_stats_pf()
1408 		loopback_drop = fm10k_read_hw_stats_32b(hw,  in fm10k_update_hw_stats_pf()
1411 		nodesc_drop = fm10k_read_hw_stats_32b(hw,  in fm10k_update_hw_stats_pf()
1417 		id = fm10k_read_reg(hw, FM10K_TXQCTL(0));  in fm10k_update_hw_stats_pf()
1448 	fm10k_update_hw_stats_q(hw, stats->q, 0, hw->mac.max_queues);  in fm10k_update_hw_stats_pf()
1459 static void fm10k_rebind_hw_stats_pf(struct fm10k_hw *hw,  in fm10k_rebind_hw_stats_pf()  argument
1473 	fm10k_unbind_hw_stats_q(stats->q, 0, hw->mac.max_queues);  in fm10k_rebind_hw_stats_pf()
1476 	fm10k_update_hw_stats_pf(hw, stats);  in fm10k_rebind_hw_stats_pf()
1487 static void fm10k_set_dma_mask_pf(struct fm10k_hw *hw, u64 dma_mask)  in fm10k_set_dma_mask_pf()  argument
1492 	fm10k_write_reg(hw, FM10K_PHYADDR, phyaddr);  in fm10k_set_dma_mask_pf()
1506 static s32 fm10k_get_fault_pf(struct fm10k_hw *hw, int type,  in fm10k_get_fault_pf()  argument
1522 	func = fm10k_read_reg(hw, type + FM10K_FAULT_FUNC);  in fm10k_get_fault_pf()
1527 	fault->address = fm10k_read_reg(hw, type + FM10K_FAULT_ADDR_HI);  in fm10k_get_fault_pf()
1529 	fault->address = fm10k_read_reg(hw, type + FM10K_FAULT_ADDR_LO);  in fm10k_get_fault_pf()
1530 	fault->specinfo = fm10k_read_reg(hw, type + FM10K_FAULT_SPECINFO);  in fm10k_get_fault_pf()
1533 	fm10k_write_reg(hw, type + FM10K_FAULT_FUNC, FM10K_FAULT_FUNC_VALID);  in fm10k_get_fault_pf()
1553 static s32 fm10k_request_lport_map_pf(struct fm10k_hw *hw)  in fm10k_request_lport_map_pf()  argument
1555 	struct fm10k_mbx_info *mbx = &hw->mbx;  in fm10k_request_lport_map_pf()
1562 	return mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_request_lport_map_pf()
1574 static s32 fm10k_get_host_state_pf(struct fm10k_hw *hw, bool *switch_ready)  in fm10k_get_host_state_pf()  argument
1580 	dma_ctrl2 = fm10k_read_reg(hw, FM10K_DMA_CTRL2);  in fm10k_get_host_state_pf()
1585 	ret_val = fm10k_get_host_state_generic(hw, switch_ready);  in fm10k_get_host_state_pf()
1590 	if (hw->mac.dglort_map == FM10K_DGLORTMAP_NONE)  in fm10k_get_host_state_pf()
1591 		ret_val = fm10k_request_lport_map_pf(hw);  in fm10k_get_host_state_pf()
1612 s32 fm10k_msg_lport_map_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_msg_lport_map_pf()  argument
1637 	hw->mac.dglort_map = dglort_map;  in fm10k_msg_lport_map_pf()
1655 s32 fm10k_msg_update_pvid_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_msg_update_pvid_pf()  argument
1672 	if (!fm10k_glort_valid_pf(hw, glort))  in fm10k_msg_update_pvid_pf()
1680 	hw->mac.default_vid = pvid;  in fm10k_msg_update_pvid_pf()
1716 s32 fm10k_msg_err_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_msg_err_pf()  argument
1729 	fm10k_record_global_table_data(&err_msg.mac, &hw->swapi.mac);  in fm10k_msg_err_pf()
1730 	fm10k_record_global_table_data(&err_msg.nexthop, &hw->swapi.nexthop);  in fm10k_msg_err_pf()
1731 	fm10k_record_global_table_data(&err_msg.ffu, &hw->swapi.ffu);  in fm10k_msg_err_pf()
1734 	hw->swapi.status = le32_to_cpu(err_msg.status);  in fm10k_msg_err_pf()
1760 static s32 fm10k_adjust_systime_pf(struct fm10k_hw *hw, s32 ppb)  in fm10k_adjust_systime_pf()  argument
1765 	if (!hw->sw_addr)  in fm10k_adjust_systime_pf()
1792 	fm10k_write_sw_reg(hw, FM10K_SW_SYSTIME_ADJUST, (u32)systime_adjust);  in fm10k_adjust_systime_pf()
1807 static u64 fm10k_read_systime_pf(struct fm10k_hw *hw)  in fm10k_read_systime_pf()  argument
1811 	systime_h = fm10k_read_reg(hw, FM10K_SYSTIME + 1);  in fm10k_read_systime_pf()
1815 		systime_l = fm10k_read_reg(hw, FM10K_SYSTIME);  in fm10k_read_systime_pf()
1816 		systime_h = fm10k_read_reg(hw, FM10K_SYSTIME + 1);  in fm10k_read_systime_pf()
1868 static s32 fm10k_get_invariants_pf(struct fm10k_hw *hw)  in fm10k_get_invariants_pf()  argument
1870 	fm10k_get_invariants_generic(hw);  in fm10k_get_invariants_pf()
1872 	return fm10k_sm_mbx_init(hw, &hw->mbx, fm10k_msg_data_pf);  in fm10k_get_invariants_pf()