115 static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw);
116 static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw);
117 static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);
118 static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
120 static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
122 static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
124 static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
126 static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,
128 static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw,
130 static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw,
132 static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw,
134 static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);
135 static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw);
136 static s32 e1000_led_on_ich8lan(struct e1000_hw *hw);
137 static s32 e1000_led_off_ich8lan(struct e1000_hw *hw);
138 static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw);
139 static s32 e1000_setup_led_pchlan(struct e1000_hw *hw);
140 static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw);
141 static s32 e1000_led_on_pchlan(struct e1000_hw *hw);
142 static s32 e1000_led_off_pchlan(struct e1000_hw *hw);
143 static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
144 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw);
145 static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw);
146 static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);
147 static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);
148 static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw);
149 static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw);
150 static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
151 static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
152 static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw);
153 static s32 e1000_k1_workaround_lv(struct e1000_hw *hw);
154 static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate);
155 static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force);
156 static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw);
157 static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state);
159 static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)  in __er16flash()  argument
161 	return readw(hw->flash_address + reg);  in __er16flash()
164 static inline u32 __er32flash(struct e1000_hw *hw, unsigned long reg)  in __er32flash()  argument
166 	return readl(hw->flash_address + reg);  in __er32flash()
169 static inline void __ew16flash(struct e1000_hw *hw, unsigned long reg, u16 val)  in __ew16flash()  argument
171 	writew(val, hw->flash_address + reg);  in __ew16flash()
174 static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val)  in __ew32flash()  argument
176 	writel(val, hw->flash_address + reg);  in __ew32flash()
179 #define er16flash(reg)		__er16flash(hw, (reg))
180 #define er32flash(reg)		__er32flash(hw, (reg))
181 #define ew16flash(reg, val)	__ew16flash(hw, (reg), (val))
182 #define ew32flash(reg, val)	__ew32flash(hw, (reg), (val))
194 static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)  in e1000_phy_is_accessible_pchlan()  argument
203 		ret_val = e1e_rphy_locked(hw, MII_PHYSID1, &phy_reg);  in e1000_phy_is_accessible_pchlan()
208 		ret_val = e1e_rphy_locked(hw, MII_PHYSID2, &phy_reg);  in e1000_phy_is_accessible_pchlan()
217 	if (hw->phy.id) {  in e1000_phy_is_accessible_pchlan()
218 		if (hw->phy.id == phy_id)  in e1000_phy_is_accessible_pchlan()
221 		hw->phy.id = phy_id;  in e1000_phy_is_accessible_pchlan()
222 		hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK);  in e1000_phy_is_accessible_pchlan()
229 	if (hw->mac.type < e1000_pch_lpt) {  in e1000_phy_is_accessible_pchlan()
230 		hw->phy.ops.release(hw);  in e1000_phy_is_accessible_pchlan()
231 		ret_val = e1000_set_mdio_slow_mode_hv(hw);  in e1000_phy_is_accessible_pchlan()
233 			ret_val = e1000e_get_phy_id(hw);  in e1000_phy_is_accessible_pchlan()
234 		hw->phy.ops.acquire(hw);  in e1000_phy_is_accessible_pchlan()
240 	if ((hw->mac.type == e1000_pch_lpt) ||  in e1000_phy_is_accessible_pchlan()
241 	    (hw->mac.type == e1000_pch_spt)) {  in e1000_phy_is_accessible_pchlan()
243 		e1e_rphy_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_phy_is_accessible_pchlan()
245 		e1e_wphy_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_phy_is_accessible_pchlan()
263 static void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw)  in e1000_toggle_lanphypc_pch_lpt()  argument
284 	if (hw->mac.type < e1000_pch_lpt) {  in e1000_toggle_lanphypc_pch_lpt()
304 static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)  in e1000_init_phy_workarounds_pchlan()  argument
306 	struct e1000_adapter *adapter = hw->adapter;  in e1000_init_phy_workarounds_pchlan()
313 	e1000_gate_hw_phy_config_ich8lan(hw, true);  in e1000_init_phy_workarounds_pchlan()
318 	hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_unknown;  in e1000_init_phy_workarounds_pchlan()
319 	e1000_disable_ulp_lpt_lp(hw, true);  in e1000_init_phy_workarounds_pchlan()
321 	ret_val = hw->phy.ops.acquire(hw);  in e1000_init_phy_workarounds_pchlan()
331 	switch (hw->mac.type) {  in e1000_init_phy_workarounds_pchlan()
334 		if (e1000_phy_is_accessible_pchlan(hw))  in e1000_init_phy_workarounds_pchlan()
352 		if (e1000_phy_is_accessible_pchlan(hw))  in e1000_init_phy_workarounds_pchlan()
357 		if ((hw->mac.type == e1000_pchlan) &&  in e1000_init_phy_workarounds_pchlan()
361 		if (hw->phy.ops.check_reset_block(hw)) {  in e1000_init_phy_workarounds_pchlan()
368 		e1000_toggle_lanphypc_pch_lpt(hw);  in e1000_init_phy_workarounds_pchlan()
369 		if (hw->mac.type >= e1000_pch_lpt) {  in e1000_init_phy_workarounds_pchlan()
370 			if (e1000_phy_is_accessible_pchlan(hw))  in e1000_init_phy_workarounds_pchlan()
380 			if (e1000_phy_is_accessible_pchlan(hw))  in e1000_init_phy_workarounds_pchlan()
390 	hw->phy.ops.release(hw);  in e1000_init_phy_workarounds_pchlan()
394 		if (hw->phy.ops.check_reset_block(hw)) {  in e1000_init_phy_workarounds_pchlan()
404 		ret_val = e1000e_phy_hw_reset_generic(hw);  in e1000_init_phy_workarounds_pchlan()
414 		ret_val = hw->phy.ops.check_reset_block(hw);  in e1000_init_phy_workarounds_pchlan()
421 	if ((hw->mac.type == e1000_pch2lan) &&  in e1000_init_phy_workarounds_pchlan()
424 		e1000_gate_hw_phy_config_ich8lan(hw, false);  in e1000_init_phy_workarounds_pchlan()
436 static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)  in e1000_init_phy_params_pchlan()  argument
438 	struct e1000_phy_info *phy = &hw->phy;  in e1000_init_phy_params_pchlan()
459 	ret_val = e1000_init_phy_workarounds_pchlan(hw);  in e1000_init_phy_params_pchlan()
464 		switch (hw->mac.type) {  in e1000_init_phy_params_pchlan()
466 			ret_val = e1000e_get_phy_id(hw);  in e1000_init_phy_params_pchlan()
478 			ret_val = e1000_set_mdio_slow_mode_hv(hw);  in e1000_init_phy_params_pchlan()
481 			ret_val = e1000e_get_phy_id(hw);  in e1000_init_phy_params_pchlan()
519 static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw)  in e1000_init_phy_params_ich8lan()  argument
521 	struct e1000_phy_info *phy = &hw->phy;  in e1000_init_phy_params_ich8lan()
534 	ret_val = e1000e_determine_phy_address(hw);  in e1000_init_phy_params_ich8lan()
538 		ret_val = e1000e_determine_phy_address(hw);  in e1000_init_phy_params_ich8lan()
549 		ret_val = e1000e_get_phy_id(hw);  in e1000_init_phy_params_ich8lan()
598 static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)  in e1000_init_nvm_params_ich8lan()  argument
600 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_init_nvm_params_ich8lan()
601 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_init_nvm_params_ich8lan()
608 	if (hw->mac.type == e1000_pch_spt) {  in e1000_init_nvm_params_ich8lan()
622 		hw->flash_address = hw->hw_addr + E1000_FLASH_BASE_ADDR;  in e1000_init_nvm_params_ich8lan()
625 		if (!hw->flash_address) {  in e1000_init_nvm_params_ich8lan()
671 static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)  in e1000_init_mac_params_ich8lan()  argument
673 	struct e1000_mac_info *mac = &hw->mac;  in e1000_init_mac_params_ich8lan()
676 	hw->phy.media_type = e1000_media_type_copper;  in e1000_init_mac_params_ich8lan()
743 		e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw, true);  in e1000_init_mac_params_ich8lan()
757 static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address,  in __e1000_access_emi_reg_locked()  argument
762 	ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, address);  in __e1000_access_emi_reg_locked()
767 		ret_val = e1e_rphy_locked(hw, I82579_EMI_DATA, data);  in __e1000_access_emi_reg_locked()
769 		ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, *data);  in __e1000_access_emi_reg_locked()
782 s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data)  in e1000_read_emi_reg_locked()  argument
784 	return __e1000_access_emi_reg_locked(hw, addr, data, true);  in e1000_read_emi_reg_locked()
795 s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data)  in e1000_write_emi_reg_locked()  argument
797 	return __e1000_access_emi_reg_locked(hw, addr, &data, false);  in e1000_write_emi_reg_locked()
814 s32 e1000_set_eee_pchlan(struct e1000_hw *hw)  in e1000_set_eee_pchlan()  argument
816 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_set_eee_pchlan()
820 	switch (hw->phy.type) {  in e1000_set_eee_pchlan()
835 	ret_val = hw->phy.ops.acquire(hw);  in e1000_set_eee_pchlan()
839 	ret_val = e1e_rphy_locked(hw, I82579_LPI_CTRL, &lpi_ctrl);  in e1000_set_eee_pchlan()
849 		ret_val = e1000_read_emi_reg_locked(hw, lpa,  in e1000_set_eee_pchlan()
855 		ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &adv);  in e1000_set_eee_pchlan()
866 			e1e_rphy_locked(hw, MII_LPA, &data);  in e1000_set_eee_pchlan()
879 	if (hw->phy.type == e1000_phy_82579) {  in e1000_set_eee_pchlan()
880 		ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,  in e1000_set_eee_pchlan()
886 		ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,  in e1000_set_eee_pchlan()
891 	ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data);  in e1000_set_eee_pchlan()
895 	ret_val = e1e_wphy_locked(hw, I82579_LPI_CTRL, lpi_ctrl);  in e1000_set_eee_pchlan()
897 	hw->phy.ops.release(hw);  in e1000_set_eee_pchlan()
913 static s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link)  in e1000_k1_workaround_lpt_lp()  argument
921 		ret_val = hw->phy.ops.acquire(hw);  in e1000_k1_workaround_lpt_lp()
926 		    e1000e_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,  in e1000_k1_workaround_lpt_lp()
932 		    e1000e_write_kmrn_reg_locked(hw,  in e1000_k1_workaround_lpt_lp()
944 		    e1000e_write_kmrn_reg_locked(hw,  in e1000_k1_workaround_lpt_lp()
948 		hw->phy.ops.release(hw);  in e1000_k1_workaround_lpt_lp()
953 		if ((hw->phy.revision > 5) || !link ||  in e1000_k1_workaround_lpt_lp()
958 		ret_val = e1e_rphy(hw, I217_INBAND_CTRL, &reg);  in e1000_k1_workaround_lpt_lp()
980 		ret_val = e1e_wphy(hw, I217_INBAND_CTRL, reg);  in e1000_k1_workaround_lpt_lp()
1007 static s32 e1000_platform_pm_pch_lpt(struct e1000_hw *hw, bool link)  in e1000_platform_pm_pch_lpt()  argument
1021 		if (!hw->adapter->max_frame_size) {  in e1000_platform_pm_pch_lpt()
1026 		hw->mac.ops.get_link_up_info(hw, &speed, &duplex);  in e1000_platform_pm_pch_lpt()
1044 			  (2 * (s64)hw->adapter->max_frame_size)) * 8 * 1000;  in e1000_platform_pm_pch_lpt()
1062 		pci_read_config_word(hw->adapter->pdev, E1000_PCI_LTR_CAP_LPT,  in e1000_platform_pm_pch_lpt()
1064 		pci_read_config_word(hw->adapter->pdev,  in e1000_platform_pm_pch_lpt()
1089 s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)  in e1000_enable_ulp_lpt_lp()  argument
1095 	if ((hw->mac.type < e1000_pch_lpt) ||  in e1000_enable_ulp_lpt_lp()
1096 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_LM) ||  in e1000_enable_ulp_lpt_lp()
1097 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_V) ||  in e1000_enable_ulp_lpt_lp()
1098 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM2) ||  in e1000_enable_ulp_lpt_lp()
1099 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V2) ||  in e1000_enable_ulp_lpt_lp()
1100 	    (hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_on))  in e1000_enable_ulp_lpt_lp()
1131 	ret_val = hw->phy.ops.acquire(hw);  in e1000_enable_ulp_lpt_lp()
1138 	if ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6)) {  in e1000_enable_ulp_lpt_lp()
1139 		ret_val = e1000_read_phy_reg_hv_locked(hw, HV_OEM_BITS,  in e1000_enable_ulp_lpt_lp()
1144 		ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS,  in e1000_enable_ulp_lpt_lp()
1151 	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_enable_ulp_lpt_lp()
1155 	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_enable_ulp_lpt_lp()
1165 	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);  in e1000_enable_ulp_lpt_lp()
1178 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_enable_ulp_lpt_lp()
1187 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_enable_ulp_lpt_lp()
1189 	hw->phy.ops.release(hw);  in e1000_enable_ulp_lpt_lp()
1194 		hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_on;  in e1000_enable_ulp_lpt_lp()
1214 static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)  in e1000_disable_ulp_lpt_lp()  argument
1221 	if ((hw->mac.type < e1000_pch_lpt) ||  in e1000_disable_ulp_lpt_lp()
1222 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_LM) ||  in e1000_disable_ulp_lpt_lp()
1223 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_V) ||  in e1000_disable_ulp_lpt_lp()
1224 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM2) ||  in e1000_disable_ulp_lpt_lp()
1225 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V2) ||  in e1000_disable_ulp_lpt_lp()
1226 	    (hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_off))  in e1000_disable_ulp_lpt_lp()
1263 	ret_val = hw->phy.ops.acquire(hw);  in e1000_disable_ulp_lpt_lp()
1269 		e1000_toggle_lanphypc_pch_lpt(hw);  in e1000_disable_ulp_lpt_lp()
1272 	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1283 		ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL,  in e1000_disable_ulp_lpt_lp()
1289 	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_disable_ulp_lpt_lp()
1299 	ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1303 	e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg);  in e1000_disable_ulp_lpt_lp()
1306 	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1315 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_disable_ulp_lpt_lp()
1319 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_disable_ulp_lpt_lp()
1327 	hw->phy.ops.release(hw);  in e1000_disable_ulp_lpt_lp()
1329 		e1000_phy_hw_reset(hw);  in e1000_disable_ulp_lpt_lp()
1336 		hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_off;  in e1000_disable_ulp_lpt_lp()
1349 static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)  in e1000_check_for_copper_link_ich8lan()  argument
1351 	struct e1000_mac_info *mac = &hw->mac;  in e1000_check_for_copper_link_ich8lan()
1369 	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);  in e1000_check_for_copper_link_ich8lan()
1373 	if (hw->mac.type == e1000_pchlan) {  in e1000_check_for_copper_link_ich8lan()
1374 		ret_val = e1000_k1_gig_workaround_hv(hw, link);  in e1000_check_for_copper_link_ich8lan()
1383 	if (((hw->mac.type == e1000_pch2lan) ||  in e1000_check_for_copper_link_ich8lan()
1384 	     (hw->mac.type == e1000_pch_lpt) ||  in e1000_check_for_copper_link_ich8lan()
1385 	     (hw->mac.type == e1000_pch_spt)) && link) {  in e1000_check_for_copper_link_ich8lan()
1405 		ret_val = hw->phy.ops.acquire(hw);  in e1000_check_for_copper_link_ich8lan()
1409 		if (hw->mac.type == e1000_pch2lan)  in e1000_check_for_copper_link_ich8lan()
1413 		ret_val = e1000_write_emi_reg_locked(hw, emi_addr, emi_val);  in e1000_check_for_copper_link_ich8lan()
1415 		hw->phy.ops.release(hw);  in e1000_check_for_copper_link_ich8lan()
1422 	if ((hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPTLP_I218_LM) ||  in e1000_check_for_copper_link_ich8lan()
1423 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPTLP_I218_V) ||  in e1000_check_for_copper_link_ich8lan()
1424 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM3) ||  in e1000_check_for_copper_link_ich8lan()
1425 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V3) ||  in e1000_check_for_copper_link_ich8lan()
1426 	    (hw->mac.type == e1000_pch_spt)) {  in e1000_check_for_copper_link_ich8lan()
1427 		ret_val = e1000_k1_workaround_lpt_lp(hw, link);  in e1000_check_for_copper_link_ich8lan()
1431 	if ((hw->mac.type == e1000_pch_lpt) ||  in e1000_check_for_copper_link_ich8lan()
1432 	    (hw->mac.type == e1000_pch_spt)) {  in e1000_check_for_copper_link_ich8lan()
1436 		ret_val = e1000_platform_pm_pch_lpt(hw, link);  in e1000_check_for_copper_link_ich8lan()
1442 	hw->dev_spec.ich8lan.eee_lp_ability = 0;  in e1000_check_for_copper_link_ich8lan()
1445 	if (hw->mac.type == e1000_pch_spt) {  in e1000_check_for_copper_link_ich8lan()
1462 	switch (hw->mac.type) {  in e1000_check_for_copper_link_ich8lan()
1464 		ret_val = e1000_k1_workaround_lv(hw);  in e1000_check_for_copper_link_ich8lan()
1469 		if (hw->phy.type == e1000_phy_82578) {  in e1000_check_for_copper_link_ich8lan()
1470 			ret_val = e1000_link_stall_workaround_hv(hw);  in e1000_check_for_copper_link_ich8lan()
1480 		e1e_rphy(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);  in e1000_check_for_copper_link_ich8lan()
1486 		e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);  in e1000_check_for_copper_link_ich8lan()
1495 	e1000e_check_downshift(hw);  in e1000_check_for_copper_link_ich8lan()
1498 	if (hw->phy.type > e1000_phy_82579) {  in e1000_check_for_copper_link_ich8lan()
1499 		ret_val = e1000_set_eee_pchlan(hw);  in e1000_check_for_copper_link_ich8lan()
1514 	mac->ops.config_collision_dist(hw);  in e1000_check_for_copper_link_ich8lan()
1521 	ret_val = e1000e_config_fc_after_link_up(hw);  in e1000_check_for_copper_link_ich8lan()
1530 	struct e1000_hw *hw = &adapter->hw;  in e1000_get_variants_ich8lan()  local
1533 	rc = e1000_init_mac_params_ich8lan(hw);  in e1000_get_variants_ich8lan()
1537 	rc = e1000_init_nvm_params_ich8lan(hw);  in e1000_get_variants_ich8lan()
1541 	switch (hw->mac.type) {  in e1000_get_variants_ich8lan()
1545 		rc = e1000_init_phy_params_ich8lan(hw);  in e1000_get_variants_ich8lan()
1551 		rc = e1000_init_phy_params_pchlan(hw);  in e1000_get_variants_ich8lan()
1562 	if ((adapter->hw.phy.type == e1000_phy_ife) ||  in e1000_get_variants_ich8lan()
1563 	    ((adapter->hw.mac.type >= e1000_pch2lan) &&  in e1000_get_variants_ich8lan()
1568 		hw->mac.ops.blink_led = NULL;  in e1000_get_variants_ich8lan()
1571 	if ((adapter->hw.mac.type == e1000_ich8lan) &&  in e1000_get_variants_ich8lan()
1572 	    (adapter->hw.phy.type != e1000_phy_ife))  in e1000_get_variants_ich8lan()
1576 	if ((adapter->hw.mac.type == e1000_pch2lan) &&  in e1000_get_variants_ich8lan()
1591 static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw __always_unused *hw)  in e1000_acquire_nvm_ich8lan()  argument
1604 static void e1000_release_nvm_ich8lan(struct e1000_hw __always_unused *hw)  in e1000_release_nvm_ich8lan()  argument
1616 static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)  in e1000_acquire_swflag_ich8lan()  argument
1622 			     &hw->adapter->state)) {  in e1000_acquire_swflag_ich8lan()
1667 		clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state);  in e1000_acquire_swflag_ich8lan()
1679 static void e1000_release_swflag_ich8lan(struct e1000_hw *hw)  in e1000_release_swflag_ich8lan()  argument
1692 	clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state);  in e1000_release_swflag_ich8lan()
1703 static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw)  in e1000_check_mng_mode_ich8lan()  argument
1721 static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw)  in e1000_check_mng_mode_pchlan()  argument
1741 static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index)  in e1000_rar_set_pch2lan()  argument
1769 	if (index < (u32)(hw->mac.rar_entry_count)) {  in e1000_rar_set_pch2lan()
1772 		ret_val = e1000_acquire_swflag_ich8lan(hw);  in e1000_rar_set_pch2lan()
1781 		e1000_release_swflag_ich8lan(hw);  in e1000_rar_set_pch2lan()
1807 static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw)  in e1000_rar_get_count_pch_lpt()  argument
1818 		num_entries = hw->mac.rar_entry_count;  in e1000_rar_get_count_pch_lpt()
1844 static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index)  in e1000_rar_set_pch_lpt()  argument
1872 	if (index < hw->mac.rar_entry_count) {  in e1000_rar_set_pch_lpt()
1883 			ret_val = e1000_acquire_swflag_ich8lan(hw);  in e1000_rar_set_pch_lpt()
1893 			e1000_release_swflag_ich8lan(hw);  in e1000_rar_set_pch_lpt()
1915 static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw)  in e1000_check_reset_block_ich8lan()  argument
1933 static s32 e1000_write_smbus_addr(struct e1000_hw *hw)  in e1000_write_smbus_addr()  argument
1943 	ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data);  in e1000_write_smbus_addr()
1951 	if (hw->phy.type == e1000_phy_i217) {  in e1000_write_smbus_addr()
1964 	return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data);  in e1000_write_smbus_addr()
1974 static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)  in e1000_sw_lcd_config_ich8lan()  argument
1976 	struct e1000_phy_info *phy = &hw->phy;  in e1000_sw_lcd_config_ich8lan()
1987 	switch (hw->mac.type) {  in e1000_sw_lcd_config_ich8lan()
1992 		if ((hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_AMT) ||  in e1000_sw_lcd_config_ich8lan()
1993 		    (hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_C)) {  in e1000_sw_lcd_config_ich8lan()
2008 	ret_val = hw->phy.ops.acquire(hw);  in e1000_sw_lcd_config_ich8lan()
2020 	if ((hw->mac.type < e1000_pch2lan) &&  in e1000_sw_lcd_config_ich8lan()
2033 	if (((hw->mac.type == e1000_pchlan) &&  in e1000_sw_lcd_config_ich8lan()
2035 	    (hw->mac.type > e1000_pchlan)) {  in e1000_sw_lcd_config_ich8lan()
2041 		ret_val = e1000_write_smbus_addr(hw);  in e1000_sw_lcd_config_ich8lan()
2046 		ret_val = e1000_write_phy_reg_hv_locked(hw, HV_LED_CONFIG,  in e1000_sw_lcd_config_ich8lan()
2058 		ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1, &reg_data);  in e1000_sw_lcd_config_ich8lan()
2062 		ret_val = e1000_read_nvm(hw, (word_addr + i * 2 + 1),  in e1000_sw_lcd_config_ich8lan()
2076 		ret_val = e1e_wphy_locked(hw, (u32)reg_addr, reg_data);  in e1000_sw_lcd_config_ich8lan()
2082 	hw->phy.ops.release(hw);  in e1000_sw_lcd_config_ich8lan()
2096 static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)  in e1000_k1_gig_workaround_hv()  argument
2100 	bool k1_enable = hw->dev_spec.ich8lan.nvm_k1_enabled;  in e1000_k1_gig_workaround_hv()
2102 	if (hw->mac.type != e1000_pchlan)  in e1000_k1_gig_workaround_hv()
2106 	ret_val = hw->phy.ops.acquire(hw);  in e1000_k1_gig_workaround_hv()
2112 		if (hw->phy.type == e1000_phy_82578) {  in e1000_k1_gig_workaround_hv()
2113 			ret_val = e1e_rphy_locked(hw, BM_CS_STATUS,  in e1000_k1_gig_workaround_hv()
2128 		if (hw->phy.type == e1000_phy_82577) {  in e1000_k1_gig_workaround_hv()
2129 			ret_val = e1e_rphy_locked(hw, HV_M_STATUS, &status_reg);  in e1000_k1_gig_workaround_hv()
2144 		ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x0100);  in e1000_k1_gig_workaround_hv()
2150 		ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x4100);  in e1000_k1_gig_workaround_hv()
2155 	ret_val = e1000_configure_k1_ich8lan(hw, k1_enable);  in e1000_k1_gig_workaround_hv()
2158 	hw->phy.ops.release(hw);  in e1000_k1_gig_workaround_hv()
2173 s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable)  in e1000_configure_k1_ich8lan()  argument
2181 	ret_val = e1000e_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,  in e1000_configure_k1_ich8lan()
2191 	ret_val = e1000e_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,  in e1000_configure_k1_ich8lan()
2224 static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)  in e1000_oem_bits_config_ich8lan()  argument
2230 	if (hw->mac.type < e1000_pchlan)  in e1000_oem_bits_config_ich8lan()
2233 	ret_val = hw->phy.ops.acquire(hw);  in e1000_oem_bits_config_ich8lan()
2237 	if (hw->mac.type == e1000_pchlan) {  in e1000_oem_bits_config_ich8lan()
2249 	ret_val = e1e_rphy_locked(hw, HV_OEM_BITS, &oem_reg);  in e1000_oem_bits_config_ich8lan()
2272 	if ((d0_state || (hw->mac.type != e1000_pchlan)) &&  in e1000_oem_bits_config_ich8lan()
2273 	    !hw->phy.ops.check_reset_block(hw))  in e1000_oem_bits_config_ich8lan()
2276 	ret_val = e1e_wphy_locked(hw, HV_OEM_BITS, oem_reg);  in e1000_oem_bits_config_ich8lan()
2279 	hw->phy.ops.release(hw);  in e1000_oem_bits_config_ich8lan()
2288 static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)  in e1000_set_mdio_slow_mode_hv()  argument
2293 	ret_val = e1e_rphy(hw, HV_KMRN_MODE_CTRL, &data);  in e1000_set_mdio_slow_mode_hv()
2299 	ret_val = e1e_wphy(hw, HV_KMRN_MODE_CTRL, data);  in e1000_set_mdio_slow_mode_hv()
2308 static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)  in e1000_hv_phy_workarounds_ich8lan()  argument
2313 	if (hw->mac.type != e1000_pchlan)  in e1000_hv_phy_workarounds_ich8lan()
2317 	if (hw->phy.type == e1000_phy_82577) {  in e1000_hv_phy_workarounds_ich8lan()
2318 		ret_val = e1000_set_mdio_slow_mode_hv(hw);  in e1000_hv_phy_workarounds_ich8lan()
2323 	if (((hw->phy.type == e1000_phy_82577) &&  in e1000_hv_phy_workarounds_ich8lan()
2324 	     ((hw->phy.revision == 1) || (hw->phy.revision == 2))) ||  in e1000_hv_phy_workarounds_ich8lan()
2325 	    ((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) {  in e1000_hv_phy_workarounds_ich8lan()
2327 		ret_val = e1e_wphy(hw, PHY_REG(769, 25), 0x4431);  in e1000_hv_phy_workarounds_ich8lan()
2332 		ret_val = e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, 0xA204);  in e1000_hv_phy_workarounds_ich8lan()
2337 	if (hw->phy.type == e1000_phy_82578) {  in e1000_hv_phy_workarounds_ich8lan()
2341 		if (hw->phy.revision < 2) {  in e1000_hv_phy_workarounds_ich8lan()
2342 			e1000e_phy_sw_reset(hw);  in e1000_hv_phy_workarounds_ich8lan()
2343 			ret_val = e1e_wphy(hw, MII_BMCR, 0x3140);  in e1000_hv_phy_workarounds_ich8lan()
2348 	ret_val = hw->phy.ops.acquire(hw);  in e1000_hv_phy_workarounds_ich8lan()
2352 	hw->phy.addr = 1;  in e1000_hv_phy_workarounds_ich8lan()
2353 	ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0);  in e1000_hv_phy_workarounds_ich8lan()
2354 	hw->phy.ops.release(hw);  in e1000_hv_phy_workarounds_ich8lan()
2361 	ret_val = e1000_k1_gig_workaround_hv(hw, true);  in e1000_hv_phy_workarounds_ich8lan()
2366 	ret_val = hw->phy.ops.acquire(hw);  in e1000_hv_phy_workarounds_ich8lan()
2369 	ret_val = e1e_rphy_locked(hw, BM_PORT_GEN_CFG, &phy_data);  in e1000_hv_phy_workarounds_ich8lan()
2372 	ret_val = e1e_wphy_locked(hw, BM_PORT_GEN_CFG, phy_data & 0x00FF);  in e1000_hv_phy_workarounds_ich8lan()
2377 	ret_val = e1000_write_emi_reg_locked(hw, I82577_MSE_THRESHOLD, 0x0034);  in e1000_hv_phy_workarounds_ich8lan()
2379 	hw->phy.ops.release(hw);  in e1000_hv_phy_workarounds_ich8lan()
2388 void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw)  in e1000_copy_rx_addrs_to_phy_ich8lan()  argument
2394 	ret_val = hw->phy.ops.acquire(hw);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2397 	ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2402 	for (i = 0; i < (hw->mac.rar_entry_count); i++) {  in e1000_copy_rx_addrs_to_phy_ich8lan()
2404 		hw->phy.ops.write_reg_page(hw, BM_RAR_L(i),  in e1000_copy_rx_addrs_to_phy_ich8lan()
2406 		hw->phy.ops.write_reg_page(hw, BM_RAR_M(i),  in e1000_copy_rx_addrs_to_phy_ich8lan()
2410 		hw->phy.ops.write_reg_page(hw, BM_RAR_H(i),  in e1000_copy_rx_addrs_to_phy_ich8lan()
2412 		hw->phy.ops.write_reg_page(hw, BM_RAR_CTRL(i),  in e1000_copy_rx_addrs_to_phy_ich8lan()
2417 	e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2420 	hw->phy.ops.release(hw);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2429 s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)  in e1000_lv_jumbo_workaround_ich8lan()  argument
2436 	if (hw->mac.type < e1000_pch2lan)  in e1000_lv_jumbo_workaround_ich8lan()
2440 	e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);  in e1000_lv_jumbo_workaround_ich8lan()
2441 	ret_val = e1e_wphy(hw, PHY_REG(769, 20), phy_reg | (1 << 14));  in e1000_lv_jumbo_workaround_ich8lan()
2449 		for (i = 0; i < hw->mac.rar_entry_count; i++) {  in e1000_lv_jumbo_workaround_ich8lan()
2468 		e1000_copy_rx_addrs_to_phy_ich8lan(hw);  in e1000_lv_jumbo_workaround_ich8lan()
2480 		ret_val = e1000e_read_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2485 		ret_val = e1000e_write_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2490 		ret_val = e1000e_read_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2497 		ret_val = e1000e_write_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2504 		e1e_rphy(hw, PHY_REG(769, 23), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2507 		ret_val = e1e_wphy(hw, PHY_REG(769, 23), data);  in e1000_lv_jumbo_workaround_ich8lan()
2510 		e1e_rphy(hw, PHY_REG(769, 16), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2512 		ret_val = e1e_wphy(hw, PHY_REG(769, 16), data);  in e1000_lv_jumbo_workaround_ich8lan()
2515 		e1e_rphy(hw, PHY_REG(776, 20), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2518 		ret_val = e1e_wphy(hw, PHY_REG(776, 20), data);  in e1000_lv_jumbo_workaround_ich8lan()
2521 		ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0xF100);  in e1000_lv_jumbo_workaround_ich8lan()
2524 		e1e_rphy(hw, HV_PM_CTRL, &data);  in e1000_lv_jumbo_workaround_ich8lan()
2525 		ret_val = e1e_wphy(hw, HV_PM_CTRL, data | (1 << 10));  in e1000_lv_jumbo_workaround_ich8lan()
2538 		ret_val = e1000e_read_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2543 		ret_val = e1000e_write_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2548 		ret_val = e1000e_read_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2555 		ret_val = e1000e_write_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2562 		e1e_rphy(hw, PHY_REG(769, 23), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2564 		ret_val = e1e_wphy(hw, PHY_REG(769, 23), data);  in e1000_lv_jumbo_workaround_ich8lan()
2567 		e1e_rphy(hw, PHY_REG(769, 16), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2569 		ret_val = e1e_wphy(hw, PHY_REG(769, 16), data);  in e1000_lv_jumbo_workaround_ich8lan()
2572 		e1e_rphy(hw, PHY_REG(776, 20), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2575 		ret_val = e1e_wphy(hw, PHY_REG(776, 20), data);  in e1000_lv_jumbo_workaround_ich8lan()
2578 		ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0x7E00);  in e1000_lv_jumbo_workaround_ich8lan()
2581 		e1e_rphy(hw, HV_PM_CTRL, &data);  in e1000_lv_jumbo_workaround_ich8lan()
2582 		ret_val = e1e_wphy(hw, HV_PM_CTRL, data & ~(1 << 10));  in e1000_lv_jumbo_workaround_ich8lan()
2588 	return e1e_wphy(hw, PHY_REG(769, 20), phy_reg & ~(1 << 14));  in e1000_lv_jumbo_workaround_ich8lan()
2595 static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)  in e1000_lv_phy_workarounds_ich8lan()  argument
2599 	if (hw->mac.type != e1000_pch2lan)  in e1000_lv_phy_workarounds_ich8lan()
2603 	ret_val = e1000_set_mdio_slow_mode_hv(hw);  in e1000_lv_phy_workarounds_ich8lan()
2607 	ret_val = hw->phy.ops.acquire(hw);  in e1000_lv_phy_workarounds_ich8lan()
2611 	ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_THRESHOLD, 0x0034);  in e1000_lv_phy_workarounds_ich8lan()
2615 	ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_LINK_DOWN, 0x0005);  in e1000_lv_phy_workarounds_ich8lan()
2617 	hw->phy.ops.release(hw);  in e1000_lv_phy_workarounds_ich8lan()
2629 static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)  in e1000_k1_workaround_lv()  argument
2634 	if (hw->mac.type != e1000_pch2lan)  in e1000_k1_workaround_lv()
2638 	ret_val = e1e_rphy(hw, HV_M_STATUS, &status_reg);  in e1000_k1_workaround_lv()
2649 			ret_val = e1e_rphy(hw, HV_PM_CTRL, &pm_phy_reg);  in e1000_k1_workaround_lv()
2653 			ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg);  in e1000_k1_workaround_lv()
2677 static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate)  in e1000_gate_hw_phy_config_ich8lan()  argument
2681 	if (hw->mac.type < e1000_pch2lan)  in e1000_gate_hw_phy_config_ich8lan()
2701 static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw)  in e1000_lan_init_done_ich8lan()  argument
2729 static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)  in e1000_post_phy_reset_ich8lan()  argument
2734 	if (hw->phy.ops.check_reset_block(hw))  in e1000_post_phy_reset_ich8lan()
2741 	switch (hw->mac.type) {  in e1000_post_phy_reset_ich8lan()
2743 		ret_val = e1000_hv_phy_workarounds_ich8lan(hw);  in e1000_post_phy_reset_ich8lan()
2748 		ret_val = e1000_lv_phy_workarounds_ich8lan(hw);  in e1000_post_phy_reset_ich8lan()
2757 	if (hw->mac.type >= e1000_pchlan) {  in e1000_post_phy_reset_ich8lan()
2758 		e1e_rphy(hw, BM_PORT_GEN_CFG, &reg);  in e1000_post_phy_reset_ich8lan()
2760 		e1e_wphy(hw, BM_PORT_GEN_CFG, reg);  in e1000_post_phy_reset_ich8lan()
2764 	ret_val = e1000_sw_lcd_config_ich8lan(hw);  in e1000_post_phy_reset_ich8lan()
2769 	ret_val = e1000_oem_bits_config_ich8lan(hw, true);  in e1000_post_phy_reset_ich8lan()
2771 	if (hw->mac.type == e1000_pch2lan) {  in e1000_post_phy_reset_ich8lan()
2775 			e1000_gate_hw_phy_config_ich8lan(hw, false);  in e1000_post_phy_reset_ich8lan()
2779 		ret_val = hw->phy.ops.acquire(hw);  in e1000_post_phy_reset_ich8lan()
2782 		ret_val = e1000_write_emi_reg_locked(hw,  in e1000_post_phy_reset_ich8lan()
2785 		hw->phy.ops.release(hw);  in e1000_post_phy_reset_ich8lan()
2799 static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)  in e1000_phy_hw_reset_ich8lan()  argument
2804 	if ((hw->mac.type == e1000_pch2lan) &&  in e1000_phy_hw_reset_ich8lan()
2806 		e1000_gate_hw_phy_config_ich8lan(hw, true);  in e1000_phy_hw_reset_ich8lan()
2808 	ret_val = e1000e_phy_hw_reset_generic(hw);  in e1000_phy_hw_reset_ich8lan()
2812 	return e1000_post_phy_reset_ich8lan(hw);  in e1000_phy_hw_reset_ich8lan()
2826 static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)  in e1000_set_lplu_state_pchlan()  argument
2831 	ret_val = e1e_rphy(hw, HV_OEM_BITS, &oem_reg);  in e1000_set_lplu_state_pchlan()
2840 	if (!hw->phy.ops.check_reset_block(hw))  in e1000_set_lplu_state_pchlan()
2843 	return e1e_wphy(hw, HV_OEM_BITS, oem_reg);  in e1000_set_lplu_state_pchlan()
2859 static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)  in e1000_set_d0_lplu_state_ich8lan()  argument
2861 	struct e1000_phy_info *phy = &hw->phy;  in e1000_set_d0_lplu_state_ich8lan()
2881 		if (hw->mac.type == e1000_ich8lan)  in e1000_set_d0_lplu_state_ich8lan()
2882 			e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000_set_d0_lplu_state_ich8lan()
2885 		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data);  in e1000_set_d0_lplu_state_ich8lan()
2889 		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);  in e1000_set_d0_lplu_state_ich8lan()
2905 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d0_lplu_state_ich8lan()
2911 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d0_lplu_state_ich8lan()
2916 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d0_lplu_state_ich8lan()
2922 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d0_lplu_state_ich8lan()
2945 static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)  in e1000_set_d3_lplu_state_ich8lan()  argument
2947 	struct e1000_phy_info *phy = &hw->phy;  in e1000_set_d3_lplu_state_ich8lan()
2967 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d3_lplu_state_ich8lan()
2973 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d3_lplu_state_ich8lan()
2978 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d3_lplu_state_ich8lan()
2984 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d3_lplu_state_ich8lan()
3001 		if (hw->mac.type == e1000_ich8lan)  in e1000_set_d3_lplu_state_ich8lan()
3002 			e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000_set_d3_lplu_state_ich8lan()
3005 		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data);  in e1000_set_d3_lplu_state_ich8lan()
3010 		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);  in e1000_set_d3_lplu_state_ich8lan()
3024 static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)  in e1000_valid_nvm_bank_detect_ich8lan()  argument
3027 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_valid_nvm_bank_detect_ich8lan()
3033 	switch (hw->mac.type) {  in e1000_valid_nvm_bank_detect_ich8lan()
3067 		ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset,  in e1000_valid_nvm_bank_detect_ich8lan()
3078 		ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset +  in e1000_valid_nvm_bank_detect_ich8lan()
3103 static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,  in e1000_read_nvm_spt()  argument
3106 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_read_nvm_spt()
3107 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_read_nvm_spt()
3122 	nvm->ops.acquire(hw);  in e1000_read_nvm_spt()
3124 	ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);  in e1000_read_nvm_spt()
3144 				  e1000_read_flash_dword_ich8lan(hw,  in e1000_read_nvm_spt()
3159 				  e1000_read_flash_dword_ich8lan(hw,  in e1000_read_nvm_spt()
3178 	nvm->ops.release(hw);  in e1000_read_nvm_spt()
3196 static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,  in e1000_read_nvm_ich8lan()  argument
3199 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_read_nvm_ich8lan()
3200 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_read_nvm_ich8lan()
3213 	nvm->ops.acquire(hw);  in e1000_read_nvm_ich8lan()
3215 	ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);  in e1000_read_nvm_ich8lan()
3229 			ret_val = e1000_read_flash_word_ich8lan(hw,  in e1000_read_nvm_ich8lan()
3238 	nvm->ops.release(hw);  in e1000_read_nvm_ich8lan()
3254 static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)  in e1000_flash_cycle_init_ich8lan()  argument
3270 	if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_init_ich8lan()
3289 		if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_init_ich8lan()
3313 			if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_init_ich8lan()
3333 static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout)  in e1000_flash_cycle_ich8lan()  argument
3340 	if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_ich8lan()
3346 	if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_ich8lan()
3374 static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_dword_ich8lan()  argument
3379 	return e1000_read_flash_data32_ich8lan(hw, offset, data);  in e1000_read_flash_dword_ich8lan()
3391 static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_word_ich8lan()  argument
3397 	return e1000_read_flash_data_ich8lan(hw, offset, 2, data);  in e1000_read_flash_word_ich8lan()
3408 static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_byte_ich8lan()  argument
3417 	if (hw->mac.type == e1000_pch_spt)  in e1000_read_flash_byte_ich8lan()
3420 		ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word);  in e1000_read_flash_byte_ich8lan()
3439 static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_data_ich8lan()  argument
3453 			     hw->nvm.flash_base_addr);  in e1000_read_flash_data_ich8lan()
3458 		ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_read_flash_data_ich8lan()
3471 		    e1000_flash_cycle_ich8lan(hw,  in e1000_read_flash_data_ich8lan()
3515 static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_data32_ich8lan()  argument
3525 	    hw->mac.type != e1000_pch_spt)  in e1000_read_flash_data32_ich8lan()
3528 			     hw->nvm.flash_base_addr);  in e1000_read_flash_data32_ich8lan()
3533 		ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_read_flash_data32_ich8lan()
3551 		   e1000_flash_cycle_ich8lan(hw,  in e1000_read_flash_data32_ich8lan()
3591 static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,  in e1000_write_nvm_ich8lan()  argument
3594 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_write_nvm_ich8lan()
3595 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_write_nvm_ich8lan()
3604 	nvm->ops.acquire(hw);  in e1000_write_nvm_ich8lan()
3611 	nvm->ops.release(hw);  in e1000_write_nvm_ich8lan()
3627 static s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw)  in e1000_update_nvm_checksum_spt()  argument
3629 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_update_nvm_checksum_spt()
3630 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_update_nvm_checksum_spt()
3635 	ret_val = e1000e_update_nvm_checksum_generic(hw);  in e1000_update_nvm_checksum_spt()
3642 	nvm->ops.acquire(hw);  in e1000_update_nvm_checksum_spt()
3648 	ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);  in e1000_update_nvm_checksum_spt()
3657 		ret_val = e1000_erase_flash_bank_ich8lan(hw, 1);  in e1000_update_nvm_checksum_spt()
3663 		ret_val = e1000_erase_flash_bank_ich8lan(hw, 0);  in e1000_update_nvm_checksum_spt()
3672 		ret_val = e1000_read_flash_dword_ich8lan(hw,  in e1000_update_nvm_checksum_spt()
3705 		ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset,  in e1000_update_nvm_checksum_spt()
3729 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);  in e1000_update_nvm_checksum_spt()
3735 	ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword);  in e1000_update_nvm_checksum_spt()
3749 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);  in e1000_update_nvm_checksum_spt()
3755 	ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword);  in e1000_update_nvm_checksum_spt()
3767 	nvm->ops.release(hw);  in e1000_update_nvm_checksum_spt()
3773 		nvm->ops.reload(hw);  in e1000_update_nvm_checksum_spt()
3795 static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)  in e1000_update_nvm_checksum_ich8lan()  argument
3797 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_update_nvm_checksum_ich8lan()
3798 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_update_nvm_checksum_ich8lan()
3803 	ret_val = e1000e_update_nvm_checksum_generic(hw);  in e1000_update_nvm_checksum_ich8lan()
3810 	nvm->ops.acquire(hw);  in e1000_update_nvm_checksum_ich8lan()
3816 	ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);  in e1000_update_nvm_checksum_ich8lan()
3825 		ret_val = e1000_erase_flash_bank_ich8lan(hw, 1);  in e1000_update_nvm_checksum_ich8lan()
3831 		ret_val = e1000_erase_flash_bank_ich8lan(hw, 0);  in e1000_update_nvm_checksum_ich8lan()
3839 			ret_val = e1000_read_flash_word_ich8lan(hw, i +  in e1000_update_nvm_checksum_ich8lan()
3861 		ret_val = e1000_retry_write_flash_byte_ich8lan(hw,  in e1000_update_nvm_checksum_ich8lan()
3868 		ret_val = e1000_retry_write_flash_byte_ich8lan(hw,  in e1000_update_nvm_checksum_ich8lan()
3890 	ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data);  in e1000_update_nvm_checksum_ich8lan()
3895 	ret_val = e1000_retry_write_flash_byte_ich8lan(hw,  in e1000_update_nvm_checksum_ich8lan()
3907 	ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0);  in e1000_update_nvm_checksum_ich8lan()
3918 	nvm->ops.release(hw);  in e1000_update_nvm_checksum_ich8lan()
3924 		nvm->ops.reload(hw);  in e1000_update_nvm_checksum_ich8lan()
3943 static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)  in e1000_validate_nvm_checksum_ich8lan()  argument
3955 	switch (hw->mac.type) {  in e1000_validate_nvm_checksum_ich8lan()
3967 	ret_val = e1000_read_nvm(hw, word, 1, &data);  in e1000_validate_nvm_checksum_ich8lan()
3973 		ret_val = e1000_write_nvm(hw, word, 1, &data);  in e1000_validate_nvm_checksum_ich8lan()
3976 		ret_val = e1000e_update_nvm_checksum(hw);  in e1000_validate_nvm_checksum_ich8lan()
3981 	return e1000e_validate_nvm_checksum_generic(hw);  in e1000_validate_nvm_checksum_ich8lan()
3994 void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw)  in e1000e_write_protect_nvm_ich8lan()  argument
3996 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000e_write_protect_nvm_ich8lan()
4001 	nvm->ops.acquire(hw);  in e1000e_write_protect_nvm_ich8lan()
4021 	nvm->ops.release(hw);  in e1000e_write_protect_nvm_ich8lan()
4033 static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_write_flash_data_ich8lan()  argument
4043 	if (hw->mac.type == e1000_pch_spt) {  in e1000_write_flash_data_ich8lan()
4052 			     hw->nvm.flash_base_addr);  in e1000_write_flash_data_ich8lan()
4057 		ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_write_flash_data_ich8lan()
4063 		if (hw->mac.type == e1000_pch_spt)  in e1000_write_flash_data_ich8lan()
4075 		if (hw->mac.type == e1000_pch_spt)  in e1000_write_flash_data_ich8lan()
4093 		    e1000_flash_cycle_ich8lan(hw,  in e1000_write_flash_data_ich8lan()
4124 static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_write_flash_data32_ich8lan()  argument
4133 	if (hw->mac.type == e1000_pch_spt) {  in e1000_write_flash_data32_ich8lan()
4138 			     hw->nvm.flash_base_addr);  in e1000_write_flash_data32_ich8lan()
4142 		ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_write_flash_data32_ich8lan()
4149 		if (hw->mac.type == e1000_pch_spt)  in e1000_write_flash_data32_ich8lan()
4162 		if (hw->mac.type == e1000_pch_spt)  in e1000_write_flash_data32_ich8lan()
4175 		   e1000_flash_cycle_ich8lan(hw,  in e1000_write_flash_data32_ich8lan()
4208 static s32 e1000_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_write_flash_byte_ich8lan()  argument
4213 	return e1000_write_flash_data_ich8lan(hw, offset, 1, word);  in e1000_write_flash_byte_ich8lan()
4225 static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw,  in e1000_retry_write_flash_dword_ich8lan()  argument
4233 	ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword);  in e1000_retry_write_flash_dword_ich8lan()
4240 		ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword);  in e1000_retry_write_flash_dword_ich8lan()
4259 static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,  in e1000_retry_write_flash_byte_ich8lan()  argument
4265 	ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte);  in e1000_retry_write_flash_byte_ich8lan()
4272 		ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte);  in e1000_retry_write_flash_byte_ich8lan()
4290 static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)  in e1000_erase_flash_bank_ich8lan()  argument
4292 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_erase_flash_bank_ich8lan()
4339 	flash_linear_addr = hw->nvm.flash_base_addr;  in e1000_erase_flash_bank_ich8lan()
4347 			ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_erase_flash_bank_ich8lan()
4354 			if (hw->mac.type == e1000_pch_spt)  in e1000_erase_flash_bank_ich8lan()
4361 			if (hw->mac.type == e1000_pch_spt)  in e1000_erase_flash_bank_ich8lan()
4374 			ret_val = e1000_flash_cycle_ich8lan(hw, timeout);  in e1000_erase_flash_bank_ich8lan()
4403 static s32 e1000_valid_led_default_ich8lan(struct e1000_hw *hw, u16 *data)  in e1000_valid_led_default_ich8lan()  argument
4407 	ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);  in e1000_valid_led_default_ich8lan()
4432 static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw)  in e1000_id_led_init_pchlan()  argument
4434 	struct e1000_mac_info *mac = &hw->mac;  in e1000_id_led_init_pchlan()
4441 	ret_val = hw->nvm.ops.valid_led_default(hw, &data);  in e1000_id_led_init_pchlan()
4498 static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)  in e1000_get_bus_info_ich8lan()  argument
4500 	struct e1000_bus_info *bus = &hw->bus;  in e1000_get_bus_info_ich8lan()
4503 	ret_val = e1000e_get_bus_info_pcie(hw);  in e1000_get_bus_info_ich8lan()
4523 static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)  in e1000_reset_hw_ich8lan()  argument
4525 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_reset_hw_ich8lan()
4533 	ret_val = e1000e_disable_pcie_master(hw);  in e1000_reset_hw_ich8lan()
4551 	if (hw->mac.type == e1000_ich8lan) {  in e1000_reset_hw_ich8lan()
4558 	if (hw->mac.type == e1000_pchlan) {  in e1000_reset_hw_ich8lan()
4560 		ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &kum_cfg);  in e1000_reset_hw_ich8lan()
4572 	if (!hw->phy.ops.check_reset_block(hw)) {  in e1000_reset_hw_ich8lan()
4582 		if ((hw->mac.type == e1000_pch2lan) &&  in e1000_reset_hw_ich8lan()
4584 			e1000_gate_hw_phy_config_ich8lan(hw, true);  in e1000_reset_hw_ich8lan()
4586 	ret_val = e1000_acquire_swflag_ich8lan(hw);  in e1000_reset_hw_ich8lan()
4593 	if (hw->mac.type == e1000_pch2lan) {  in e1000_reset_hw_ich8lan()
4601 		clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state);  in e1000_reset_hw_ich8lan()
4604 		ret_val = hw->phy.ops.get_cfg_done(hw);  in e1000_reset_hw_ich8lan()
4608 		ret_val = e1000_post_phy_reset_ich8lan(hw);  in e1000_reset_hw_ich8lan()
4617 	if (hw->mac.type == e1000_pchlan)  in e1000_reset_hw_ich8lan()
4642 static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)  in e1000_init_hw_ich8lan()  argument
4644 	struct e1000_mac_info *mac = &hw->mac;  in e1000_init_hw_ich8lan()
4649 	e1000_initialize_hw_bits_ich8lan(hw);  in e1000_init_hw_ich8lan()
4652 	ret_val = mac->ops.id_led_init(hw);  in e1000_init_hw_ich8lan()
4658 	e1000e_init_rx_addrs(hw, mac->rar_entry_count);  in e1000_init_hw_ich8lan()
4663 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);  in e1000_init_hw_ich8lan()
4669 	if (hw->phy.type == e1000_phy_82578) {  in e1000_init_hw_ich8lan()
4670 		e1e_rphy(hw, BM_PORT_GEN_CFG, &i);  in e1000_init_hw_ich8lan()
4672 		e1e_wphy(hw, BM_PORT_GEN_CFG, i);  in e1000_init_hw_ich8lan()
4673 		ret_val = e1000_phy_hw_reset_ich8lan(hw);  in e1000_init_hw_ich8lan()
4679 	ret_val = mac->ops.setup_link(hw);  in e1000_init_hw_ich8lan()
4702 	e1000e_set_pcie_no_snoop(hw, snoop);  in e1000_init_hw_ich8lan()
4713 	e1000_clear_hw_cntrs_ich8lan(hw);  in e1000_init_hw_ich8lan()
4725 static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw)  in e1000_initialize_hw_bits_ich8lan()  argument
4733 	if (hw->mac.type >= e1000_pchlan)  in e1000_initialize_hw_bits_ich8lan()
4749 	if (hw->mac.type == e1000_ich8lan)  in e1000_initialize_hw_bits_ich8lan()
4764 	if (hw->mac.type == e1000_ich8lan) {  in e1000_initialize_hw_bits_ich8lan()
4779 	if (hw->mac.type == e1000_ich8lan)  in e1000_initialize_hw_bits_ich8lan()
4784 	if ((hw->mac.type == e1000_pch_lpt) ||  in e1000_initialize_hw_bits_ich8lan()
4785 	    (hw->mac.type == e1000_pch_spt)) {  in e1000_initialize_hw_bits_ich8lan()
4806 static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)  in e1000_setup_link_ich8lan()  argument
4810 	if (hw->phy.ops.check_reset_block(hw))  in e1000_setup_link_ich8lan()
4817 	if (hw->fc.requested_mode == e1000_fc_default) {  in e1000_setup_link_ich8lan()
4819 		if (hw->mac.type == e1000_pchlan)  in e1000_setup_link_ich8lan()
4820 			hw->fc.requested_mode = e1000_fc_rx_pause;  in e1000_setup_link_ich8lan()
4822 			hw->fc.requested_mode = e1000_fc_full;  in e1000_setup_link_ich8lan()
4828 	hw->fc.current_mode = hw->fc.requested_mode;  in e1000_setup_link_ich8lan()
4830 	e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc.current_mode);  in e1000_setup_link_ich8lan()
4833 	ret_val = hw->mac.ops.setup_physical_interface(hw);  in e1000_setup_link_ich8lan()
4837 	ew32(FCTTV, hw->fc.pause_time);  in e1000_setup_link_ich8lan()
4838 	if ((hw->phy.type == e1000_phy_82578) ||  in e1000_setup_link_ich8lan()
4839 	    (hw->phy.type == e1000_phy_82579) ||  in e1000_setup_link_ich8lan()
4840 	    (hw->phy.type == e1000_phy_i217) ||  in e1000_setup_link_ich8lan()
4841 	    (hw->phy.type == e1000_phy_82577)) {  in e1000_setup_link_ich8lan()
4842 		ew32(FCRTV_PCH, hw->fc.refresh_time);  in e1000_setup_link_ich8lan()
4844 		ret_val = e1e_wphy(hw, PHY_REG(BM_PORT_CTRL_PAGE, 27),  in e1000_setup_link_ich8lan()
4845 				   hw->fc.pause_time);  in e1000_setup_link_ich8lan()
4850 	return e1000e_set_fc_watermarks(hw);  in e1000_setup_link_ich8lan()
4861 static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)  in e1000_setup_copper_link_ich8lan()  argument
4876 	ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_TIMEOUTS, 0xFFFF);  in e1000_setup_copper_link_ich8lan()
4879 	ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,  in e1000_setup_copper_link_ich8lan()
4884 	ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,  in e1000_setup_copper_link_ich8lan()
4889 	switch (hw->phy.type) {  in e1000_setup_copper_link_ich8lan()
4891 		ret_val = e1000e_copper_link_setup_igp(hw);  in e1000_setup_copper_link_ich8lan()
4897 		ret_val = e1000e_copper_link_setup_m88(hw);  in e1000_setup_copper_link_ich8lan()
4903 		ret_val = e1000_copper_link_setup_82577(hw);  in e1000_setup_copper_link_ich8lan()
4908 		ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, &reg_data);  in e1000_setup_copper_link_ich8lan()
4914 		switch (hw->phy.mdix) {  in e1000_setup_copper_link_ich8lan()
4926 		ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data);  in e1000_setup_copper_link_ich8lan()
4934 	return e1000e_setup_copper_link(hw);  in e1000_setup_copper_link_ich8lan()
4945 static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw)  in e1000_setup_copper_link_pch_lpt()  argument
4955 	ret_val = e1000_copper_link_setup_82577(hw);  in e1000_setup_copper_link_pch_lpt()
4959 	return e1000e_setup_copper_link(hw);  in e1000_setup_copper_link_pch_lpt()
4972 static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed,  in e1000_get_link_up_info_ich8lan()  argument
4977 	ret_val = e1000e_get_speed_and_duplex_copper(hw, speed, duplex);  in e1000_get_link_up_info_ich8lan()
4981 	if ((hw->mac.type == e1000_ich8lan) &&  in e1000_get_link_up_info_ich8lan()
4982 	    (hw->phy.type == e1000_phy_igp_3) && (*speed == SPEED_1000)) {  in e1000_get_link_up_info_ich8lan()
4983 		ret_val = e1000_kmrn_lock_loss_workaround_ich8lan(hw);  in e1000_get_link_up_info_ich8lan()
5004 static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)  in e1000_kmrn_lock_loss_workaround_ich8lan()  argument
5006 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_kmrn_lock_loss_workaround_ich8lan()
5019 	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5025 		ret_val = e1e_rphy(hw, IGP3_KMRN_DIAG, &data);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5029 		ret_val = e1e_rphy(hw, IGP3_KMRN_DIAG, &data);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5038 		e1000_phy_hw_reset(hw);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5050 	e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5064 void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,  in e1000e_set_kmrn_lock_loss_workaround_ich8lan()  argument
5067 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000e_set_kmrn_lock_loss_workaround_ich8lan()
5069 	if (hw->mac.type != e1000_ich8lan) {  in e1000e_set_kmrn_lock_loss_workaround_ich8lan()
5087 void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)  in e1000e_igp3_phy_powerdown_workaround_ich8lan()  argument
5093 	if (hw->phy.type != e1000_phy_igp_3)  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5107 		if (hw->mac.type == e1000_ich8lan)  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5108 			e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5111 		e1e_rphy(hw, IGP3_VR_CTRL, &data);  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5113 		e1e_wphy(hw, IGP3_VR_CTRL, data | IGP3_VR_CTRL_MODE_SHUTDOWN);  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5116 		e1e_rphy(hw, IGP3_VR_CTRL, &data);  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5138 void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)  in e1000e_gig_downshift_workaround_ich8lan()  argument
5143 	if ((hw->mac.type != e1000_ich8lan) || (hw->phy.type == e1000_phy_ife))  in e1000e_gig_downshift_workaround_ich8lan()
5146 	ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET,  in e1000e_gig_downshift_workaround_ich8lan()
5151 	ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET,  in e1000e_gig_downshift_workaround_ich8lan()
5156 	e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET, reg_data);  in e1000e_gig_downshift_workaround_ich8lan()
5173 void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw)  in e1000_suspend_workarounds_ich8lan()  argument
5175 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_suspend_workarounds_ich8lan()
5182 	if (hw->phy.type == e1000_phy_i217) {  in e1000_suspend_workarounds_ich8lan()
5183 		u16 phy_reg, device_id = hw->adapter->pdev->device;  in e1000_suspend_workarounds_ich8lan()
5189 		    (hw->mac.type == e1000_pch_spt)) {  in e1000_suspend_workarounds_ich8lan()
5195 		ret_val = hw->phy.ops.acquire(hw);  in e1000_suspend_workarounds_ich8lan()
5203 			    e1000_read_emi_reg_locked(hw,  in e1000_suspend_workarounds_ich8lan()
5217 			    (hw->phy.autoneg_advertised & ADVERTISE_100_FULL)) {  in e1000_suspend_workarounds_ich8lan()
5222 				e1e_rphy_locked(hw,  in e1000_suspend_workarounds_ich8lan()
5225 				e1e_wphy_locked(hw,  in e1000_suspend_workarounds_ich8lan()
5239 			e1e_rphy_locked(hw, I217_PROXY_CTRL, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5241 			e1e_wphy_locked(hw, I217_PROXY_CTRL, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5246 			e1e_rphy_locked(hw, I217_SxCTRL, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5248 			e1e_wphy_locked(hw, I217_SxCTRL, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5251 			e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5253 			e1e_wphy_locked(hw, I217_MEMPWR, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5259 		e1e_rphy_locked(hw, I217_CGFREG, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5261 		e1e_wphy_locked(hw, I217_CGFREG, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5264 		hw->phy.ops.release(hw);  in e1000_suspend_workarounds_ich8lan()
5269 	if (hw->mac.type == e1000_ich8lan)  in e1000_suspend_workarounds_ich8lan()
5270 		e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000_suspend_workarounds_ich8lan()
5272 	if (hw->mac.type >= e1000_pchlan) {  in e1000_suspend_workarounds_ich8lan()
5273 		e1000_oem_bits_config_ich8lan(hw, false);  in e1000_suspend_workarounds_ich8lan()
5276 		if (hw->mac.type == e1000_pchlan)  in e1000_suspend_workarounds_ich8lan()
5277 			e1000e_phy_hw_reset_generic(hw);  in e1000_suspend_workarounds_ich8lan()
5279 		ret_val = hw->phy.ops.acquire(hw);  in e1000_suspend_workarounds_ich8lan()
5282 		e1000_write_smbus_addr(hw);  in e1000_suspend_workarounds_ich8lan()
5283 		hw->phy.ops.release(hw);  in e1000_suspend_workarounds_ich8lan()
5297 void e1000_resume_workarounds_pchlan(struct e1000_hw *hw)  in e1000_resume_workarounds_pchlan()  argument
5301 	if (hw->mac.type < e1000_pch2lan)  in e1000_resume_workarounds_pchlan()
5304 	ret_val = e1000_init_phy_workarounds_pchlan(hw);  in e1000_resume_workarounds_pchlan()
5315 	if (hw->phy.type == e1000_phy_i217) {  in e1000_resume_workarounds_pchlan()
5318 		ret_val = hw->phy.ops.acquire(hw);  in e1000_resume_workarounds_pchlan()
5325 		e1e_rphy_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg);  in e1000_resume_workarounds_pchlan()
5327 		e1e_wphy_locked(hw, I217_LPI_GPIO_CTRL, phy_reg);  in e1000_resume_workarounds_pchlan()
5333 			ret_val = e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg);  in e1000_resume_workarounds_pchlan()
5337 			e1e_wphy_locked(hw, I217_MEMPWR, phy_reg);  in e1000_resume_workarounds_pchlan()
5340 			e1e_wphy_locked(hw, I217_PROXY_CTRL, 0);  in e1000_resume_workarounds_pchlan()
5343 		ret_val = e1e_rphy_locked(hw, I217_CGFREG, &phy_reg);  in e1000_resume_workarounds_pchlan()
5347 		e1e_wphy_locked(hw, I217_CGFREG, phy_reg);  in e1000_resume_workarounds_pchlan()
5351 		hw->phy.ops.release(hw);  in e1000_resume_workarounds_pchlan()
5361 static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw)  in e1000_cleanup_led_ich8lan()  argument
5363 	if (hw->phy.type == e1000_phy_ife)  in e1000_cleanup_led_ich8lan()
5364 		return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);  in e1000_cleanup_led_ich8lan()
5366 	ew32(LEDCTL, hw->mac.ledctl_default);  in e1000_cleanup_led_ich8lan()
5376 static s32 e1000_led_on_ich8lan(struct e1000_hw *hw)  in e1000_led_on_ich8lan()  argument
5378 	if (hw->phy.type == e1000_phy_ife)  in e1000_led_on_ich8lan()
5379 		return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED,  in e1000_led_on_ich8lan()
5382 	ew32(LEDCTL, hw->mac.ledctl_mode2);  in e1000_led_on_ich8lan()
5392 static s32 e1000_led_off_ich8lan(struct e1000_hw *hw)  in e1000_led_off_ich8lan()  argument
5394 	if (hw->phy.type == e1000_phy_ife)  in e1000_led_off_ich8lan()
5395 		return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED,  in e1000_led_off_ich8lan()
5399 	ew32(LEDCTL, hw->mac.ledctl_mode1);  in e1000_led_off_ich8lan()
5409 static s32 e1000_setup_led_pchlan(struct e1000_hw *hw)  in e1000_setup_led_pchlan()  argument
5411 	return e1e_wphy(hw, HV_LED_CONFIG, (u16)hw->mac.ledctl_mode1);  in e1000_setup_led_pchlan()
5420 static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw)  in e1000_cleanup_led_pchlan()  argument
5422 	return e1e_wphy(hw, HV_LED_CONFIG, (u16)hw->mac.ledctl_default);  in e1000_cleanup_led_pchlan()
5431 static s32 e1000_led_on_pchlan(struct e1000_hw *hw)  in e1000_led_on_pchlan()  argument
5433 	u16 data = (u16)hw->mac.ledctl_mode2;  in e1000_led_on_pchlan()
5452 	return e1e_wphy(hw, HV_LED_CONFIG, data);  in e1000_led_on_pchlan()
5461 static s32 e1000_led_off_pchlan(struct e1000_hw *hw)  in e1000_led_off_pchlan()  argument
5463 	u16 data = (u16)hw->mac.ledctl_mode1;  in e1000_led_off_pchlan()
5482 	return e1e_wphy(hw, HV_LED_CONFIG, data);  in e1000_led_off_pchlan()
5497 static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)  in e1000_get_cfg_done_ich8lan()  argument
5503 	e1000e_get_cfg_done_generic(hw);  in e1000_get_cfg_done_ich8lan()
5506 	if (hw->mac.type >= e1000_ich10lan) {  in e1000_get_cfg_done_ich8lan()
5507 		e1000_lan_init_done_ich8lan(hw);  in e1000_get_cfg_done_ich8lan()
5509 		ret_val = e1000e_get_auto_rd_done(hw);  in e1000_get_cfg_done_ich8lan()
5528 	if (hw->mac.type <= e1000_ich9lan) {  in e1000_get_cfg_done_ich8lan()
5530 		    (hw->phy.type == e1000_phy_igp_3)) {  in e1000_get_cfg_done_ich8lan()
5531 			e1000e_phy_init_script_igp3(hw);  in e1000_get_cfg_done_ich8lan()
5534 		if (e1000_valid_nvm_bank_detect_ich8lan(hw, &bank)) {  in e1000_get_cfg_done_ich8lan()
5551 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw)  in e1000_power_down_phy_copper_ich8lan()  argument
5554 	if (!(hw->mac.ops.check_mng_mode(hw) ||  in e1000_power_down_phy_copper_ich8lan()
5555 	      hw->phy.ops.check_reset_block(hw)))  in e1000_power_down_phy_copper_ich8lan()
5556 		e1000_power_down_phy_copper(hw);  in e1000_power_down_phy_copper_ich8lan()
5566 static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw)  in e1000_clear_hw_cntrs_ich8lan()  argument
5571 	e1000e_clear_hw_cntrs_base(hw);  in e1000_clear_hw_cntrs_ich8lan()
5588 	if ((hw->phy.type == e1000_phy_82578) ||  in e1000_clear_hw_cntrs_ich8lan()
5589 	    (hw->phy.type == e1000_phy_82579) ||  in e1000_clear_hw_cntrs_ich8lan()
5590 	    (hw->phy.type == e1000_phy_i217) ||  in e1000_clear_hw_cntrs_ich8lan()
5591 	    (hw->phy.type == e1000_phy_82577)) {  in e1000_clear_hw_cntrs_ich8lan()
5592 		ret_val = hw->phy.ops.acquire(hw);  in e1000_clear_hw_cntrs_ich8lan()
5595 		ret_val = hw->phy.ops.set_page(hw,  in e1000_clear_hw_cntrs_ich8lan()
5599 		hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5600 		hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5601 		hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5602 		hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5603 		hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5604 		hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5605 		hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5606 		hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5607 		hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5608 		hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5609 		hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5610 		hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5611 		hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5612 		hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5614 		hw->phy.ops.release(hw);  in e1000_clear_hw_cntrs_ich8lan()