1000 	struct hcp_ehea_port_cb0 *cb0;  in ehea_sense_port_attr()  local
1003 	cb0 = (void *)get_zeroed_page(GFP_ATOMIC);  in ehea_sense_port_attr()
1004 	if (!cb0) {  in ehea_sense_port_attr()
1013 				      cb0);  in ehea_sense_port_attr()
1020 	port->mac_addr = cb0->port_mac_addr << 16;  in ehea_sense_port_attr()
1028 	switch (cb0->port_speed) {  in ehea_sense_port_attr()
1060 	port->num_mcs = cb0->num_default_qps;  in ehea_sense_port_attr()
1064 		port->num_def_qps = cb0->num_default_qps;  in ehea_sense_port_attr()
1076 		ehea_dump(cb0, sizeof(*cb0), "ehea_sense_port_attr");  in ehea_sense_port_attr()
1077 	free_page((unsigned long)cb0);  in ehea_sense_port_attr()
1374 	struct hcp_ehea_port_cb0 *cb0;  in ehea_configure_port()  local
1377 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_configure_port()
1378 	if (!cb0)  in ehea_configure_port()
1381 	cb0->port_rc = EHEA_BMASK_SET(PXLY_RC_VALID, 1)  in ehea_configure_port()
1391 			cb0->default_qpn_arr[i] =  in ehea_configure_port()
1394 			cb0->default_qpn_arr[i] =  in ehea_configure_port()
1398 		ehea_dump(cb0, sizeof(*cb0), "ehea_configure_port");  in ehea_configure_port()
1405 				       H_PORT_CB0, mask, cb0);  in ehea_configure_port()
1413 	free_page((unsigned long)cb0);  in ehea_configure_port()
1747 	struct hcp_ehea_port_cb0 *cb0;  in ehea_set_mac_addr()  local
1756 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_set_mac_addr()
1757 	if (!cb0) {  in ehea_set_mac_addr()
1763 	memcpy(&(cb0->port_mac_addr), &(mac_addr->sa_data[0]), ETH_ALEN);  in ehea_set_mac_addr()
1765 	cb0->port_mac_addr = cb0->port_mac_addr >> 16;  in ehea_set_mac_addr()
1769 				       EHEA_BMASK_SET(H_PORT_CB0_MAC, 1), cb0);  in ehea_set_mac_addr()
1784 	port->mac_addr = cb0->port_mac_addr << 16;  in ehea_set_mac_addr()
1798 	free_page((unsigned long)cb0);  in ehea_set_mac_addr()
2207 	struct hcp_modify_qp_cb0 *cb0;  in ehea_activate_qp()  local
2209 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_activate_qp()
2210 	if (!cb0) {  in ehea_activate_qp()
2216 				    EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);  in ehea_activate_qp()
2222 	cb0->qp_ctl_reg = H_QP_CR_STATE_INITIALIZED;  in ehea_activate_qp()
2224 				     EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,  in ehea_activate_qp()
2232 				    EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);  in ehea_activate_qp()
2238 	cb0->qp_ctl_reg = H_QP_CR_ENABLED | H_QP_CR_STATE_INITIALIZED;  in ehea_activate_qp()
2240 				     EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,  in ehea_activate_qp()
2248 				    EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);  in ehea_activate_qp()
2254 	cb0->qp_ctl_reg = H_QP_CR_ENABLED | H_QP_CR_STATE_RDY2SND;  in ehea_activate_qp()
2256 				     EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,  in ehea_activate_qp()
2264 				    EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);  in ehea_activate_qp()
2272 	free_page((unsigned long)cb0);  in ehea_activate_qp()
2547 	struct hcp_modify_qp_cb0 *cb0;  in ehea_stop_qps()  local
2555 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_stop_qps()
2556 	if (!cb0) {  in ehea_stop_qps()
2571 					    cb0);  in ehea_stop_qps()
2577 		cb0->qp_ctl_reg = (cb0->qp_ctl_reg & H_QP_CR_RES_STATE) << 8;  in ehea_stop_qps()
2578 		cb0->qp_ctl_reg &= ~H_QP_CR_ENABLED;  in ehea_stop_qps()
2582 							    1), cb0, &dummy64,  in ehea_stop_qps()
2591 					    cb0);  in ehea_stop_qps()
2607 	free_page((unsigned long)cb0);  in ehea_stop_qps()
2652 	struct hcp_modify_qp_cb0 *cb0;  in ehea_restart_qps()  local
2657 	cb0 = (void *)get_zeroed_page(GFP_KERNEL);  in ehea_restart_qps()
2658 	if (!cb0) {  in ehea_restart_qps()
2678 					    cb0);  in ehea_restart_qps()
2684 		cb0->qp_ctl_reg = (cb0->qp_ctl_reg & H_QP_CR_RES_STATE) << 8;  in ehea_restart_qps()
2685 		cb0->qp_ctl_reg |= H_QP_CR_ENABLED;  in ehea_restart_qps()
2689 							    1), cb0, &dummy64,  in ehea_restart_qps()
2698 					    cb0);  in ehea_restart_qps()
2710 	free_page((unsigned long)cb0);  in ehea_restart_qps()