448 	iowrite32(crvalue & ~(CR_W_RXEN), ioaddr + TCRRCR);  in stop_nic_rx()
459 	iowrite32(crvalue & ~(CR_W_RXEN+CR_W_TXEN), ioaddr + TCRRCR);  in stop_nic_rxtx()
546 	iowrite32(0x00000001, ioaddr + BCR);  in fealnx_init_one()
655 			iowrite32(ADVERTISE_FULL, ioaddr + ANARANLPAR);  in fealnx_init_one()
723 		iowrite32(miir, miiport);  in m80x_send_cmd_to_phy()
727 		iowrite32(miir, miiport);  in m80x_send_cmd_to_phy()
741 		iowrite32(miir, miiport);  in m80x_send_cmd_to_phy()
744 		iowrite32(miir, miiport);  in m80x_send_cmd_to_phy()
771 		iowrite32(miir, miiport);  in mdio_read()
780 		iowrite32(miir, miiport);  in mdio_read()
789 	iowrite32(miir, miiport);  in mdio_read()
811 		iowrite32(miir, miiport);  in mdio_write()
815 		iowrite32(miir, miiport);  in mdio_write()
823 	iowrite32(miir, miiport);  in mdio_write()
834 	iowrite32(0x00000001, ioaddr + BCR);	/* Reset */  in netdev_open()
846 	iowrite32(np->rx_ring_dma, ioaddr + RXLBA);  in netdev_open()
847 	iowrite32(np->tx_ring_dma, ioaddr + TXLBA);  in netdev_open()
888 	iowrite32(np->bcrvalue, ioaddr + BCR);  in netdev_open()
893 	iowrite32(0, ioaddr + RXPDR);  in netdev_open()
906 	iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR);  in netdev_open()
907 	iowrite32(np->imrvalue, ioaddr + IMR);  in netdev_open()
1108 				iowrite32(np->crvalue, ioaddr + TCRRCR);  in netdev_timer()
1134 	iowrite32(0, ioaddr + IMR);  in reset_and_disable_rxtx()
1137 	iowrite32(0x00000001, ioaddr + BCR);  in reset_and_disable_rxtx()
1157 	iowrite32(np->tx_ring_dma + ((char*)np->cur_tx - (char*)np->tx_ring),  in enable_rxtx()
1159 	iowrite32(np->rx_ring_dma + ((char*)np->cur_rx - (char*)np->rx_ring),  in enable_rxtx()
1162 	iowrite32(np->bcrvalue, ioaddr + BCR);  in enable_rxtx()
1164 	iowrite32(0, ioaddr + RXPDR);  in enable_rxtx()
1168 	iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR);  in enable_rxtx()
1169 	iowrite32(np->imrvalue, ioaddr + IMR);  in enable_rxtx()
1171 	iowrite32(0, ioaddr + TXPDR);  in enable_rxtx()
1369 	iowrite32(0, np->mem + TXPDR);  in start_tx()
1426 	iowrite32(np->rx_ring_dma + ((char*)np->cur_rx - (char*)np->rx_ring),  in reset_rx_descriptors()
1444 	iowrite32(0, ioaddr + IMR);  in intr_handler()
1450 		iowrite32(intr_status, ioaddr + ISR);  in intr_handler()
1471 			iowrite32(0, ioaddr + TXPDR);  in intr_handler()
1489 				iowrite32(np->crvalue, ioaddr + TCRRCR);  in intr_handler()
1602 	iowrite32(np->imrvalue, ioaddr + IMR);  in intr_handler()
1683 					iowrite32(np->crvalue, ioaddr + TCRRCR);  in netdev_rx()
1805 	iowrite32(mc_filter[0], ioaddr + MAR0);  in __set_rx_mode()
1806 	iowrite32(mc_filter[1], ioaddr + MAR1);  in __set_rx_mode()
1809 	iowrite32(np->crvalue, ioaddr + TCRRCR);  in __set_rx_mode()
1902 	iowrite32(0x0000, ioaddr + IMR);  in netdev_close()