518 	u32 reg = readl(ioaddr + XGMAC_OMR);  in xgmac_dma_flush_tx_fifo()
521 	while ((timeout-- > 0) && readl(ioaddr + XGMAC_OMR) & XGMAC_OMR_FTF)  in xgmac_dma_flush_tx_fifo()
600 	u32 value = readl(ioaddr + XGMAC_CONTROL);  in xgmac_mac_enable()
604 	value = readl(ioaddr + XGMAC_DMA_CONTROL);  in xgmac_mac_enable()
611 	u32 value = readl(ioaddr + XGMAC_DMA_CONTROL);  in xgmac_mac_disable()
615 	value = readl(ioaddr + XGMAC_CONTROL);  in xgmac_mac_disable()
642 	hi_addr = readl(ioaddr + XGMAC_ADDR_HIGH(num));  in xgmac_get_mac_addr()
643 	lo_addr = readl(ioaddr + XGMAC_ADDR_LOW(num));  in xgmac_get_mac_addr()
673 		reg = readl(priv->base + XGMAC_OMR);  in xgmac_set_flow_ctrl()
679 		reg = readl(priv->base + XGMAC_OMR);  in xgmac_set_flow_ctrl()
926 	reg = readl(priv->base + XGMAC_DMA_CONTROL);  in xgmac_tx_timeout_work()
929 		value = readl(priv->base + XGMAC_DMA_STATUS) & 0x700000;  in xgmac_tx_timeout_work()
960 	ctrl = readl(ioaddr + XGMAC_CONTROL) & XGMAC_CONTROL_SPD_MASK;  in xgmac_hw_init()
967 		(readl(ioaddr + XGMAC_DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))  in xgmac_hw_init()
1062 	if (readl(priv->base + XGMAC_DMA_INTR_ENA))  in xgmac_stop()
1398 		readl(ioaddr + XGMAC_PMT);  in xgmac_pmt_interrupt()
1474 	storage->rx_bytes = readl(base + XGMAC_MMC_RXOCTET_G_LO);  in xgmac_get_stats64()
1475 	storage->rx_bytes |= (u64)(readl(base + XGMAC_MMC_RXOCTET_G_HI)) << 32;  in xgmac_get_stats64()
1477 	storage->rx_packets = readl(base + XGMAC_MMC_RXFRAME_GB_LO);  in xgmac_get_stats64()
1478 	storage->multicast = readl(base + XGMAC_MMC_RXMCFRAME_G);  in xgmac_get_stats64()
1479 	storage->rx_crc_errors = readl(base + XGMAC_MMC_RXCRCERR);  in xgmac_get_stats64()
1480 	storage->rx_length_errors = readl(base + XGMAC_MMC_RXLENGTHERR);  in xgmac_get_stats64()
1481 	storage->rx_missed_errors = readl(base + XGMAC_MMC_RXOVERFLOW);  in xgmac_get_stats64()
1483 	storage->tx_bytes = readl(base + XGMAC_MMC_TXOCTET_G_LO);  in xgmac_get_stats64()
1484 	storage->tx_bytes |= (u64)(readl(base + XGMAC_MMC_TXOCTET_G_HI)) << 32;  in xgmac_get_stats64()
1486 	count = readl(base + XGMAC_MMC_TXFRAME_GB_LO);  in xgmac_get_stats64()
1487 	storage->tx_errors = count - readl(base + XGMAC_MMC_TXFRAME_G_LO);  in xgmac_get_stats64()
1489 	storage->tx_fifo_errors = readl(base + XGMAC_MMC_TXUNDERFLOW);  in xgmac_get_stats64()
1522 	ctrl = readl(ioaddr + XGMAC_CONTROL);  in xgmac_set_features()
1623 			*data++ = readl(priv->base +  in xgmac_get_ethtool_stats()
1755 	uid = readl(priv->base + XGMAC_VERSION);  in xgmac_probe()
1760 	if (readl(priv->base + XGMAC_ADDR_HIGH(31)) == 1)  in xgmac_probe()
1801 	if (readl(priv->base + XGMAC_DMA_HW_FEATURE) & DMA_HW_FEAT_TXCOESEL)  in xgmac_probe()
1893 		value = readl(priv->base + XGMAC_DMA_CONTROL);  in xgmac_suspend()