Lines Matching refs:MACB_BIT
47 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
48 | MACB_BIT(ISR_ROVR))
49 #define MACB_TX_ERR_FLAGS (MACB_BIT(ISR_TUND) \
50 | MACB_BIT(ISR_RLE) \
51 | MACB_BIT(TXERR))
52 #define MACB_TX_INT_FLAGS (MACB_TX_ERR_FLAGS | MACB_BIT(TCOMP))
264 reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD)); in macb_handle_link_change()
269 reg |= MACB_BIT(FD); in macb_handle_link_change()
271 reg |= MACB_BIT(SPD); in macb_handle_link_change()
373 macb_writel(bp, NCR, MACB_BIT(MPE)); in macb_mii_init()
465 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(THALT)); in macb_halt_tx()
471 if (!(status & MACB_BIT(TGO))) in macb_halt_tx()
545 if (ctrl & MACB_BIT(TX_USED)) { in macb_tx_error_task()
557 if (!(ctrl & MACB_BIT(TX_BUF_EXHAUSTED))) { in macb_tx_error_task()
569 if (ctrl & MACB_BIT(TX_BUF_EXHAUSTED)) in macb_tx_error_task()
573 desc->ctrl = ctrl | MACB_BIT(TX_USED); in macb_tx_error_task()
582 desc->ctrl = MACB_BIT(TX_USED); in macb_tx_error_task()
599 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART)); in macb_tx_error_task()
616 queue_writel(queue, ISR, MACB_BIT(TCOMP)); in macb_tx_interrupt()
638 if (!(ctrl & MACB_BIT(TX_USED))) in macb_tx_interrupt()
707 paddr |= MACB_BIT(RX_WRAP); in gem_rx_refill()
714 bp->rx_ring[entry].addr &= ~MACB_BIT(RX_USED); in gem_rx_refill()
734 desc->addr &= ~MACB_BIT(RX_USED); in discard_partial_frame()
767 if (!(addr & MACB_BIT(RX_USED))) in gem_rx()
773 if (!(ctrl & MACB_BIT(RX_SOF) && ctrl & MACB_BIT(RX_EOF))) { in gem_rx()
854 desc->addr &= ~MACB_BIT(RX_USED); in macb_rx_frame()
881 desc->addr &= ~MACB_BIT(RX_USED); in macb_rx_frame()
918 if (!(addr & MACB_BIT(RX_USED))) in macb_rx()
921 if (ctrl & MACB_BIT(RX_SOF)) { in macb_rx()
927 if (ctrl & MACB_BIT(RX_EOF)) { in macb_rx()
970 macb_writel(bp, ISR, MACB_BIT(RCOMP)); in macb_poll()
1017 queue_writel(queue, ISR, MACB_BIT(RCOMP)); in macb_interrupt()
1035 if (status & MACB_BIT(TCOMP)) in macb_interrupt()
1049 if (status & MACB_BIT(RXUBR)) { in macb_interrupt()
1051 macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE)); in macb_interrupt()
1052 macb_writel(bp, NCR, ctrl | MACB_BIT(RE)); in macb_interrupt()
1055 macb_writel(bp, ISR, MACB_BIT(RXUBR)); in macb_interrupt()
1058 if (status & MACB_BIT(ISR_ROVR)) { in macb_interrupt()
1066 queue_writel(queue, ISR, MACB_BIT(ISR_ROVR)); in macb_interrupt()
1069 if (status & MACB_BIT(HRESP)) { in macb_interrupt()
1078 queue_writel(queue, ISR, MACB_BIT(HRESP)); in macb_interrupt()
1200 ctrl = MACB_BIT(TX_USED); in macb_tx_map()
1212 ctrl |= MACB_BIT(TX_LAST); in macb_tx_map()
1216 ctrl |= MACB_BIT(TX_WRAP); in macb_tx_map()
1293 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART)); in macb_start_xmit()
1468 queue->tx_ring[i].ctrl = MACB_BIT(TX_USED); in gem_init_rings()
1470 queue->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); in gem_init_rings()
1492 bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP); in macb_init_rings()
1496 bp->queues[0].tx_ring[i].ctrl = MACB_BIT(TX_USED); in macb_init_rings()
1500 bp->queues[0].tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); in macb_init_rings()
1517 macb_writel(bp, NCR, MACB_BIT(CLRSTAT)); in macb_reset_hw()
1619 __raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR); in macb_configure_dma()
1622 if (tmp == MACB_BIT(LLB)) in macb_configure_dma()
1652 config |= MACB_BIT(PAE); /* PAuse Enable */ in macb_init_hw()
1653 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ in macb_init_hw()
1654 config |= MACB_BIT(BIG); /* Receive oversized frames */ in macb_init_hw()
1656 config |= MACB_BIT(CAF); /* Copy All Frames */ in macb_init_hw()
1660 config |= MACB_BIT(NBC); /* No BroadCast */ in macb_init_hw()
1677 MACB_BIT(HRESP)); in macb_init_hw()
1681 macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE)); in macb_init_hw()
1776 cfg |= MACB_BIT(CAF); in macb_set_rx_mode()
1783 cfg &= ~MACB_BIT(CAF); in macb_set_rx_mode()
1794 cfg |= MACB_BIT(NCFGR_MTI); in macb_set_rx_mode()
1798 cfg |= MACB_BIT(NCFGR_MTI); in macb_set_rx_mode()
1803 cfg &= ~MACB_BIT(NCFGR_MTI); in macb_set_rx_mode()
2344 val = MACB_BIT(RMII); in macb_init()
2346 val = MACB_BIT(MII); in macb_init()
2349 val |= MACB_BIT(CLKEN); in macb_init()
2403 lp->rx_ring[AT91ETHER_MAX_RX_DESCR - 1].addr |= MACB_BIT(RX_WRAP); in at91ether_start()
2413 macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE)); in at91ether_start()
2427 macb_writel(lp, NCR, ctl | MACB_BIT(CLRSTAT)); in at91ether_open()
2436 macb_writel(lp, IER, MACB_BIT(RCOMP) | in at91ether_open()
2437 MACB_BIT(RXUBR) | in at91ether_open()
2438 MACB_BIT(ISR_TUND) | in at91ether_open()
2439 MACB_BIT(ISR_RLE) | in at91ether_open()
2440 MACB_BIT(TCOMP) | in at91ether_open()
2441 MACB_BIT(ISR_ROVR) | in at91ether_open()
2442 MACB_BIT(HRESP)); in at91ether_open()
2460 macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE))); in at91ether_close()
2463 macb_writel(lp, IDR, MACB_BIT(RCOMP) | in at91ether_close()
2464 MACB_BIT(RXUBR) | in at91ether_close()
2465 MACB_BIT(ISR_TUND) | in at91ether_close()
2466 MACB_BIT(ISR_RLE) | in at91ether_close()
2467 MACB_BIT(TCOMP) | in at91ether_close()
2468 MACB_BIT(ISR_ROVR) | in at91ether_close()
2469 MACB_BIT(HRESP)); in at91ether_close()
2492 if (macb_readl(lp, TSR) & MACB_BIT(RM9200_BNQ)) { in at91ether_start_xmit()
2524 while (lp->rx_ring[lp->rx_tail].addr & MACB_BIT(RX_USED)) { in at91ether_rx()
2540 if (lp->rx_ring[lp->rx_tail].ctrl & MACB_BIT(RX_MHASH_MATCH)) in at91ether_rx()
2544 lp->rx_ring[lp->rx_tail].addr &= ~MACB_BIT(RX_USED); in at91ether_rx()
2567 if (intstatus & MACB_BIT(RCOMP)) in at91ether_interrupt()
2571 if (intstatus & MACB_BIT(TCOMP)) { in at91ether_interrupt()
2573 if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE))) in at91ether_interrupt()
2588 if (intstatus & MACB_BIT(RXUBR)) { in at91ether_interrupt()
2590 macb_writel(lp, NCR, ctl & ~MACB_BIT(RE)); in at91ether_interrupt()
2591 macb_writel(lp, NCR, ctl | MACB_BIT(RE)); in at91ether_interrupt()
2594 if (intstatus & MACB_BIT(ISR_ROVR)) in at91ether_interrupt()
2664 reg = MACB_BF(CLK, MACB_CLK_DIV32) | MACB_BIT(BIG); in at91ether_init()
2666 reg |= MACB_BIT(RM9200_RMII); in at91ether_init()