9836 	u32 val, rdmac_mode;  in tg3_reset_hw()  local
10227 	rdmac_mode = (RDMAC_MODE_ENABLE | RDMAC_MODE_TGTABORT_ENAB |  in tg3_reset_hw()
10234 		rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS;  in tg3_reset_hw()
10239 		rdmac_mode |= RDMAC_MODE_BD_SBD_CRPT_ENAB |  in tg3_reset_hw()
10247 			rdmac_mode |= RDMAC_MODE_FIFO_SIZE_128;  in tg3_reset_hw()
10250 			rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST;  in tg3_reset_hw()
10255 		rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST;  in tg3_reset_hw()
10260 			rdmac_mode |= RDMAC_MODE_JMB_2K_MMRR;  in tg3_reset_hw()
10268 		rdmac_mode |= RDMAC_MODE_IPV4_LSO_EN;  in tg3_reset_hw()
10273 		rdmac_mode |= RDMAC_MODE_IPV6_LSO_EN;  in tg3_reset_hw()
10277 		rdmac_mode |= tr32(RDMAC_MODE) & RDMAC_MODE_H2BNC_VLAN_DET;  in tg3_reset_hw()
10325 	} else if ((rdmac_mode & RDMAC_MODE_FIFO_SIZE_128) &&  in tg3_reset_hw()
10487 	tw32_f(RDMAC_MODE, rdmac_mode);  in tg3_reset_hw()