Lines Matching refs:TG3PCI_CLOCK_CTRL
1082 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL); in tg3_switch_clocks()
1092 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1096 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1100 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1104 tw32_wait_f(TG3PCI_CLOCK_CTRL, clock_ctrl, 40); in tg3_switch_clocks()
4187 tw32_wait_f(TG3PCI_CLOCK_CTRL, base_val | CLOCK_CTRL_ALTCLK | in tg3_power_down_prepare()
4210 tw32_wait_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl | newbits1, in tg3_power_down_prepare()
4213 tw32_wait_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl | newbits2, in tg3_power_down_prepare()
4228 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_power_down_prepare()
9247 tw32(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); in tg3_chip_reset()
9972 tw32_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); in tg3_reset_hw()
17285 u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); in tg3_test_dma()
17520 u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL) & 0x1f; in tg3_bus_string()