Lines Matching refs:GRC_MODE
3553 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3554 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3564 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3565 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
6424 tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); in tg3_dump_legacy_regs()
9234 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9906 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9910 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9916 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9921 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9925 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9932 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9943 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9947 tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); in tg3_reset_hw()
9955 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10049 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16751 val = tr32(GRC_MODE); in tg3_get_invariants()
16762 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()