Lines Matching refs:REG_WR
231 REG_WR(bp, BNX2X_Q_VOQ_REG_ADDR(pf_q_num), new_cos); in bnx2x_map_q_cos()
236 REG_WR(bp, reg_addr, reg_bit_map & (~q_bit_map)); in bnx2x_map_q_cos()
241 REG_WR(bp, reg_addr, reg_bit_map | q_bit_map); in bnx2x_map_q_cos()
253 REG_WR(bp, reg_addr, reg_bit_map); in bnx2x_map_q_cos()
687 REG_WR(bp, mcp_attn_ctl_regs[i].addr, reg_val); in bnx2x_set_mcp_parity()
711 REG_WR(bp, bnx2x_blocks_parity_data[i].mask_addr, in bnx2x_disable_blocks_parity()
734 REG_WR(bp, XSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); in bnx2x_clear_blocks_parity()
735 REG_WR(bp, TSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); in bnx2x_clear_blocks_parity()
736 REG_WR(bp, USEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); in bnx2x_clear_blocks_parity()
737 REG_WR(bp, CSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); in bnx2x_clear_blocks_parity()
765 REG_WR(bp, MISC_REG_AEU_CLR_LATCH_SIGNAL, 0x780); in bnx2x_clear_blocks_parity()
776 REG_WR(bp, bnx2x_blocks_parity_data[i].mask_addr, in bnx2x_enable_blocks_parity()