97 	u32 ctl;  in bgmac_dma_tx_enable()  local
99 	ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL);  in bgmac_dma_tx_enable()
101 		ctl &= ~BGMAC_DMA_TX_BL_MASK;  in bgmac_dma_tx_enable()
102 		ctl |= BGMAC_DMA_TX_BL_128 << BGMAC_DMA_TX_BL_SHIFT;  in bgmac_dma_tx_enable()
104 		ctl &= ~BGMAC_DMA_TX_MR_MASK;  in bgmac_dma_tx_enable()
105 		ctl |= BGMAC_DMA_TX_MR_2 << BGMAC_DMA_TX_MR_SHIFT;  in bgmac_dma_tx_enable()
107 		ctl &= ~BGMAC_DMA_TX_PC_MASK;  in bgmac_dma_tx_enable()
108 		ctl |= BGMAC_DMA_TX_PC_16 << BGMAC_DMA_TX_PC_SHIFT;  in bgmac_dma_tx_enable()
110 		ctl &= ~BGMAC_DMA_TX_PT_MASK;  in bgmac_dma_tx_enable()
111 		ctl |= BGMAC_DMA_TX_PT_8 << BGMAC_DMA_TX_PT_SHIFT;  in bgmac_dma_tx_enable()
113 	ctl |= BGMAC_DMA_TX_ENABLE;  in bgmac_dma_tx_enable()
114 	ctl |= BGMAC_DMA_TX_PARITY_DISABLE;  in bgmac_dma_tx_enable()
115 	bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, ctl);  in bgmac_dma_tx_enable()
314 	u32 ctl;  in bgmac_dma_rx_enable()  local
316 	ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL);  in bgmac_dma_rx_enable()
318 		ctl &= ~BGMAC_DMA_RX_BL_MASK;  in bgmac_dma_rx_enable()
319 		ctl |= BGMAC_DMA_RX_BL_128 << BGMAC_DMA_RX_BL_SHIFT;  in bgmac_dma_rx_enable()
321 		ctl &= ~BGMAC_DMA_RX_PC_MASK;  in bgmac_dma_rx_enable()
322 		ctl |= BGMAC_DMA_RX_PC_8 << BGMAC_DMA_RX_PC_SHIFT;  in bgmac_dma_rx_enable()
324 		ctl &= ~BGMAC_DMA_RX_PT_MASK;  in bgmac_dma_rx_enable()
325 		ctl |= BGMAC_DMA_RX_PT_1 << BGMAC_DMA_RX_PT_SHIFT;  in bgmac_dma_rx_enable()
327 	ctl &= BGMAC_DMA_RX_ADDREXT_MASK;  in bgmac_dma_rx_enable()
328 	ctl |= BGMAC_DMA_RX_ENABLE;  in bgmac_dma_rx_enable()
329 	ctl |= BGMAC_DMA_RX_PARITY_DISABLE;  in bgmac_dma_rx_enable()
330 	ctl |= BGMAC_DMA_RX_OVERFLOW_CONT;  in bgmac_dma_rx_enable()
331 	ctl |= BGMAC_RX_FRAME_OFFSET << BGMAC_DMA_RX_FRAME_OFFSET_SHIFT;  in bgmac_dma_rx_enable()
332 	bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, ctl);  in bgmac_dma_rx_enable()