25 static void xgene_enet_ring_init(struct xgene_enet_desc_ring *ring)  in xgene_enet_ring_init()  argument
27 	u32 *ring_cfg = ring->state;  in xgene_enet_ring_init()
28 	u64 addr = ring->dma;  in xgene_enet_ring_init()
29 	enum xgene_enet_ring_cfgsize cfgsize = ring->cfgsize;  in xgene_enet_ring_init()
45 static void xgene_enet_ring_set_type(struct xgene_enet_desc_ring *ring)  in xgene_enet_ring_set_type()  argument
47 	u32 *ring_cfg = ring->state;  in xgene_enet_ring_set_type()
51 	is_bufpool = xgene_enet_is_bufpool(ring->id);  in xgene_enet_ring_set_type()
62 static void xgene_enet_ring_set_recombbuf(struct xgene_enet_desc_ring *ring)  in xgene_enet_ring_set_recombbuf()  argument
64 	u32 *ring_cfg = ring->state;  in xgene_enet_ring_set_recombbuf()
72 static void xgene_enet_ring_wr32(struct xgene_enet_desc_ring *ring,  in xgene_enet_ring_wr32()  argument
75 	struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);  in xgene_enet_ring_wr32()
80 static void xgene_enet_ring_rd32(struct xgene_enet_desc_ring *ring,  in xgene_enet_ring_rd32()  argument
83 	struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);  in xgene_enet_ring_rd32()
88 static void xgene_enet_write_ring_state(struct xgene_enet_desc_ring *ring)  in xgene_enet_write_ring_state()  argument
92 	xgene_enet_ring_wr32(ring, CSR_RING_CONFIG, ring->num);  in xgene_enet_write_ring_state()
94 		xgene_enet_ring_wr32(ring, CSR_RING_WR_BASE + (i * 4),  in xgene_enet_write_ring_state()
95 				     ring->state[i]);  in xgene_enet_write_ring_state()
99 static void xgene_enet_clr_ring_state(struct xgene_enet_desc_ring *ring)  in xgene_enet_clr_ring_state()  argument
101 	memset(ring->state, 0, sizeof(u32) * NUM_RING_CONFIG);  in xgene_enet_clr_ring_state()
102 	xgene_enet_write_ring_state(ring);  in xgene_enet_clr_ring_state()
105 static void xgene_enet_set_ring_state(struct xgene_enet_desc_ring *ring)  in xgene_enet_set_ring_state()  argument
107 	xgene_enet_ring_set_type(ring);  in xgene_enet_set_ring_state()
109 	if (xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH0)  in xgene_enet_set_ring_state()
110 		xgene_enet_ring_set_recombbuf(ring);  in xgene_enet_set_ring_state()
112 	xgene_enet_ring_init(ring);  in xgene_enet_set_ring_state()
113 	xgene_enet_write_ring_state(ring);  in xgene_enet_set_ring_state()
116 static void xgene_enet_set_ring_id(struct xgene_enet_desc_ring *ring)  in xgene_enet_set_ring_id()  argument
121 	is_bufpool = xgene_enet_is_bufpool(ring->id);  in xgene_enet_set_ring_id()
123 	ring_id_val = ring->id & GENMASK(9, 0);  in xgene_enet_set_ring_id()
126 	ring_id_buf = (ring->num << 9) & GENMASK(18, 9);  in xgene_enet_set_ring_id()
131 	xgene_enet_ring_wr32(ring, CSR_RING_ID, ring_id_val);  in xgene_enet_set_ring_id()
132 	xgene_enet_ring_wr32(ring, CSR_RING_ID_BUF, ring_id_buf);  in xgene_enet_set_ring_id()
135 static void xgene_enet_clr_desc_ring_id(struct xgene_enet_desc_ring *ring)  in xgene_enet_clr_desc_ring_id()  argument
139 	ring_id = ring->id | OVERWRITE;  in xgene_enet_clr_desc_ring_id()
140 	xgene_enet_ring_wr32(ring, CSR_RING_ID, ring_id);  in xgene_enet_clr_desc_ring_id()
141 	xgene_enet_ring_wr32(ring, CSR_RING_ID_BUF, 0);  in xgene_enet_clr_desc_ring_id()
145 					struct xgene_enet_desc_ring *ring)  in xgene_enet_setup_ring()  argument
147 	u32 size = ring->size;  in xgene_enet_setup_ring()
151 	xgene_enet_clr_ring_state(ring);  in xgene_enet_setup_ring()
152 	xgene_enet_set_ring_state(ring);  in xgene_enet_setup_ring()
153 	xgene_enet_set_ring_id(ring);  in xgene_enet_setup_ring()
155 	ring->slots = xgene_enet_get_numslots(ring->id, size);  in xgene_enet_setup_ring()
157 	is_bufpool = xgene_enet_is_bufpool(ring->id);  in xgene_enet_setup_ring()
158 	if (is_bufpool || xgene_enet_ring_owner(ring->id) != RING_OWNER_CPU)  in xgene_enet_setup_ring()
159 		return ring;  in xgene_enet_setup_ring()
161 	for (i = 0; i < ring->slots; i++)  in xgene_enet_setup_ring()
162 		xgene_enet_mark_desc_slot_empty(&ring->raw_desc[i]);  in xgene_enet_setup_ring()
164 	xgene_enet_ring_rd32(ring, CSR_RING_NE_INT_MODE, &data);  in xgene_enet_setup_ring()
165 	data |= BIT(31 - xgene_enet_ring_bufnum(ring->id));  in xgene_enet_setup_ring()
166 	xgene_enet_ring_wr32(ring, CSR_RING_NE_INT_MODE, data);  in xgene_enet_setup_ring()
168 	return ring;  in xgene_enet_setup_ring()
171 void xgene_enet_clear_ring(struct xgene_enet_desc_ring *ring)  in xgene_enet_clear_ring()  argument
176 	is_bufpool = xgene_enet_is_bufpool(ring->id);  in xgene_enet_clear_ring()
177 	if (is_bufpool || xgene_enet_ring_owner(ring->id) != RING_OWNER_CPU)  in xgene_enet_clear_ring()
180 	xgene_enet_ring_rd32(ring, CSR_RING_NE_INT_MODE, &data);  in xgene_enet_clear_ring()
181 	data &= ~BIT(31 - xgene_enet_ring_bufnum(ring->id));  in xgene_enet_clear_ring()
182 	xgene_enet_ring_wr32(ring, CSR_RING_NE_INT_MODE, data);  in xgene_enet_clear_ring()
185 	xgene_enet_clr_desc_ring_id(ring);  in xgene_enet_clear_ring()
186 	xgene_enet_clr_ring_state(ring);  in xgene_enet_clear_ring()
189 void xgene_enet_parse_error(struct xgene_enet_desc_ring *ring,  in xgene_enet_parse_error()  argument