318 		outb_p(E8390_NODMA+E8390_PAGE1+E8390_STOP, ioaddr + E8390_CMD);  in ne_probe1()
320 		outb_p(0xff, ioaddr + 0x0d);  in ne_probe1()
321 		outb_p(E8390_NODMA+E8390_PAGE0, ioaddr + E8390_CMD);  in ne_probe1()
324 			outb_p(reg0, ioaddr);  in ne_probe1()
325 			outb_p(regd, ioaddr + 0x0d);	/* Restore the old values. */  in ne_probe1()
364 		outb_p(0xff, ioaddr + EN0_ISR);		/* Ack all intr. */  in ne_probe1()
390 			outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);  in ne_probe1()
405 		outb_p(DCR_VAL, ioaddr + EN0_DCFG);  in ne_probe1()
481 		outb_p(0x50, ioaddr + EN0_IMR);	/* Enable one interrupt. */  in ne_probe1()
482 		outb_p(0x00, ioaddr + EN0_RCNTLO);  in ne_probe1()
483 		outb_p(0x00, ioaddr + EN0_RCNTHI);  in ne_probe1()
484 		outb_p(E8390_RREAD+E8390_START, ioaddr); /* Trigger it... */  in ne_probe1()
486 		outb_p(0x00, ioaddr + EN0_IMR); 		/* Mask it again. */  in ne_probe1()
512 	outb_p(E8390_NODMA + E8390_PAGE1 + E8390_STOP,  in ne_probe1()
585 	outb_p(ENISR_RESET, NE_BASE + EN0_ISR);	/* Ack intr. */  in ne_reset_8390()
607 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);  in ne_get_8390_hdr()
608 	outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in ne_get_8390_hdr()
609 	outb_p(0, nic_base + EN0_RCNTHI);  in ne_get_8390_hdr()
610 	outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */  in ne_get_8390_hdr()
611 	outb_p(ring_page, nic_base + EN0_RSARHI);  in ne_get_8390_hdr()
612 	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ne_get_8390_hdr()
619 	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ne_get_8390_hdr()
648 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);  in ne_block_input()
649 	outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in ne_block_input()
650 	outb_p(count >> 8, nic_base + EN0_RCNTHI);  in ne_block_input()
651 	outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);  in ne_block_input()
652 	outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);  in ne_block_input()
653 	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ne_block_input()
693 	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ne_block_input()
724 	outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);  in ne_block_output()
736 	outb_p(0x42, nic_base + EN0_RCNTLO);  in ne_block_output()
737 	outb_p(0x00,   nic_base + EN0_RCNTHI);  in ne_block_output()
738 	outb_p(0x42, nic_base + EN0_RSARLO);  in ne_block_output()
739 	outb_p(0x00, nic_base + EN0_RSARHI);  in ne_block_output()
740 	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ne_block_output()
745 	outb_p(ENISR_RDC, nic_base + EN0_ISR);  in ne_block_output()
748 	outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in ne_block_output()
749 	outb_p(count >> 8,   nic_base + EN0_RCNTHI);  in ne_block_output()
750 	outb_p(0x00, nic_base + EN0_RSARLO);  in ne_block_output()
751 	outb_p(start_page, nic_base + EN0_RSARHI);  in ne_block_output()
753 	outb_p(E8390_RWRITE+E8390_START, nic_base + NE_CMD);  in ne_block_output()
797 	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ne_block_output()