222 	outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);  in get_prom()
424 	outb_p(MDIO_DATA_WRITE1, addr);  in mdio_sync()
425 	outb_p(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);  in mdio_sync()
437 	outb_p(dat, addr);  in mdio_read()
438 	outb_p(dat | MDIO_SHIFT_CLK, addr);  in mdio_read()
441 	outb_p(MDIO_ENB_IN, addr);  in mdio_read()
443 	outb_p(MDIO_ENB_IN | MDIO_SHIFT_CLK, addr);  in mdio_read()
456 	outb_p(dat, addr);  in mdio_write()
457 	outb_p(dat | MDIO_SHIFT_CLK, addr);  in mdio_write()
460 	outb_p(MDIO_ENB_IN, addr);  in mdio_write()
461 	outb_p(MDIO_ENB_IN | MDIO_SHIFT_CLK, addr);  in mdio_write()
479     outb_p(0xFF, nic_base + EN0_ISR); /* Clear bogus intr. */  in axnet_open()
526     outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, nic_base + E8390_CMD);  in axnet_reset_8390()
535     outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */  in axnet_reset_8390()
634     outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */  in get_8390_hdr()
635     outb_p(ring_page, nic_base + EN0_RSARHI);  in get_8390_hdr()
636     outb_p(E8390_RREAD+E8390_START, nic_base + AXNET_CMD);  in get_8390_hdr()
657     outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);  in block_input()
658     outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);  in block_input()
659     outb_p(E8390_RREAD+E8390_START, nic_base + AXNET_CMD);  in block_input()
682     outb_p(0x00, nic_base + EN0_RSARLO);  in block_output()
683     outb_p(start_page, nic_base + EN0_RSARHI);  in block_output()
684     outb_p(E8390_RWRITE+E8390_START, nic_base + AXNET_CMD);  in block_output()
972 	outb_p(0x00, e8390_base + EN0_IMR);  in axnet_start_xmit()
1020 		outb_p(ENISR_ALL, e8390_base + EN0_IMR);  in axnet_start_xmit()
1065 	outb_p(ENISR_ALL, e8390_base + EN0_IMR);  in axnet_start_xmit()
1125 	outb_p(0x00, e8390_base + EN0_ISR);  in ax_interrupt()
1135 			outb_p(interrupts, e8390_base + EN0_ISR);  in ax_interrupt()
1142 		outb_p(interrupts, e8390_base + EN0_ISR);  in ax_interrupt()
1146 			outb_p(0, e8390_base + EN0_ISR);  in ax_interrupt()
1147 			outb_p(interrupts, e8390_base + EN0_ISR);  in ax_interrupt()
1180 			outb_p(ENISR_ALL, e8390_base + EN0_ISR); /* Ack. most intrs. */  in ax_interrupt()
1184 			outb_p(0xff, e8390_base + EN0_ISR); /* Ack. all intrs. */  in ax_interrupt()
1190 	outb_p(ENISR_ALL, e8390_base + EN0_IMR);  in ax_interrupt()
1433 		outb_p(next_frame-1, e8390_base+EN0_BOUNDARY);  in ei_receive()
1462 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD);  in ei_rx_overrun()
1477 	outb_p(0x00, e8390_base+EN0_RCNTLO);  in ei_rx_overrun()
1478 	outb_p(0x00, e8390_base+EN0_RCNTHI);  in ei_rx_overrun()
1496 	outb_p(E8390_TXOFF, e8390_base + EN0_TXCR);  in ei_rx_overrun()
1497 	outb_p(E8390_NODMA + E8390_PAGE0 + E8390_START, e8390_base + E8390_CMD);  in ei_rx_overrun()
1507 	outb_p(E8390_TXCONFIG | info->duplex_flag, e8390_base + EN0_TXCR);   in ei_rx_overrun()
1509     		outb_p(E8390_NODMA + E8390_PAGE0 + E8390_START + E8390_TRANS, e8390_base + E8390_CMD);  in ei_rx_overrun()
1579 	outb_p(E8390_NODMA + E8390_PAGE1, e8390_base + E8390_CMD);  in do_set_multicast_list()
1582 		outb_p(ei_local->mcfilter[i], e8390_base + EN1_MULT_SHIFT(i));  in do_set_multicast_list()
1584 	outb_p(E8390_NODMA + E8390_PAGE0, e8390_base + E8390_CMD);  in do_set_multicast_list()
1587   		outb_p(E8390_RXCONFIG | 0x58, e8390_base + EN0_RXCR);  in do_set_multicast_list()
1589   		outb_p(E8390_RXCONFIG | 0x48, e8390_base + EN0_RXCR);  in do_set_multicast_list()
1591   		outb_p(E8390_RXCONFIG | 0x40, e8390_base + EN0_RXCR);  in do_set_multicast_list()
1593 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, e8390_base+E8390_CMD);  in do_set_multicast_list()
1633 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD); /* 0x21 */  in AX88190_init()
1634 	outb_p(endcfg, e8390_base + EN0_DCFG);	/* 0x48 or 0x49 */  in AX88190_init()
1636 	outb_p(0x00,  e8390_base + EN0_RCNTLO);  in AX88190_init()
1637 	outb_p(0x00,  e8390_base + EN0_RCNTHI);  in AX88190_init()
1639 	outb_p(E8390_RXOFF|0x40, e8390_base + EN0_RXCR); /* 0x60 */  in AX88190_init()
1640 	outb_p(E8390_TXOFF, e8390_base + EN0_TXCR); /* 0x02 */  in AX88190_init()
1642 	outb_p(ei_local->tx_start_page, e8390_base + EN0_TPSR);  in AX88190_init()
1644 	outb_p(ei_local->rx_start_page, e8390_base + EN0_STARTPG);  in AX88190_init()
1645 	outb_p(ei_local->stop_page-1, e8390_base + EN0_BOUNDARY);	/* 3c503 says 0x3f,NS0x26*/  in AX88190_init()
1647 	outb_p(ei_local->stop_page, e8390_base + EN0_STOPPG);  in AX88190_init()
1649 	outb_p(0xFF, e8390_base + EN0_ISR);  in AX88190_init()
1650 	outb_p(0x00,  e8390_base + EN0_IMR);  in AX88190_init()
1654 	outb_p(E8390_NODMA + E8390_PAGE1 + E8390_STOP, e8390_base+E8390_CMD); /* 0x61 */  in AX88190_init()
1657 		outb_p(dev->dev_addr[i], e8390_base + EN1_PHYS_SHIFT(i));  in AX88190_init()
1662 	outb_p(ei_local->rx_start_page, e8390_base + EN1_CURPAG);  in AX88190_init()
1663 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD);  in AX88190_init()
1674 		outb_p(0xff,  e8390_base + EN0_ISR);  in AX88190_init()
1675 		outb_p(ENISR_ALL,  e8390_base + EN0_IMR);  in AX88190_init()
1676 		outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, e8390_base+E8390_CMD);  in AX88190_init()
1677 		outb_p(E8390_TXCONFIG | info->duplex_flag,  in AX88190_init()
1680 		outb_p(E8390_RXCONFIG | 0x40, e8390_base + EN0_RXCR); /* rx on, */  in AX88190_init()
1699 	outb_p(length & 0xff, e8390_base + EN0_TCNTLO);  in NS8390_trigger_send()
1700 	outb_p(length >> 8, e8390_base + EN0_TCNTHI);  in NS8390_trigger_send()
1701 	outb_p(start_page, e8390_base + EN0_TPSR);  in NS8390_trigger_send()
1702 	outb_p(E8390_NODMA+E8390_TRANS+E8390_START, e8390_base+E8390_CMD);  in NS8390_trigger_send()