171 	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_0, 0x0000);  in mv88e6xxx_config_prio()
172 	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_1, 0x0000);  in mv88e6xxx_config_prio()
173 	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_2, 0x5555);  in mv88e6xxx_config_prio()
174 	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_3, 0x5555);  in mv88e6xxx_config_prio()
175 	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_4, 0xaaaa);  in mv88e6xxx_config_prio()
176 	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_5, 0xaaaa);  in mv88e6xxx_config_prio()
177 	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_6, 0xffff);  in mv88e6xxx_config_prio()
178 	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_7, 0xffff);  in mv88e6xxx_config_prio()
181 	REG_WRITE(REG_GLOBAL, GLOBAL_IEEE_PRI, 0xfa41);  in mv88e6xxx_config_prio()
188 	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, (addr[0] << 8) | addr[1]);  in mv88e6xxx_set_addr_direct()
189 	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]);  in mv88e6xxx_set_addr_direct()
190 	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]);  in mv88e6xxx_set_addr_direct()
243 	ret = REG_READ(REG_GLOBAL, GLOBAL_CONTROL);  in mv88e6xxx_ppu_disable()
244 	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,  in mv88e6xxx_ppu_disable()
249 		ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS);  in mv88e6xxx_ppu_disable()
264 	ret = REG_READ(REG_GLOBAL, GLOBAL_CONTROL);  in mv88e6xxx_ppu_enable()
265 	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, ret | GLOBAL_CONTROL_PPU_ENABLE);  in mv88e6xxx_ppu_enable()
269 		ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS);  in mv88e6xxx_ppu_enable()
456 		ret = REG_READ(REG_GLOBAL, GLOBAL_STATS_OP);  in mv88e6xxx_stats_wait()
472 	REG_WRITE(REG_GLOBAL, GLOBAL_STATS_OP,  in mv88e6xxx_stats_snapshot()
491 	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP,  in mv88e6xxx_stats_read()
501 	ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_32);  in mv88e6xxx_stats_read()
507 	ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_01);  in mv88e6xxx_stats_read()
791 	return _mv88e6xxx_wait(ds, REG_GLOBAL, GLOBAL_ATU_OP,  in _mv88e6xxx_atu_wait()
878 	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x01, fid);  in _mv88e6xxx_atu_cmd()
882 	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_OP, cmd);  in _mv88e6xxx_atu_cmd()
1095 			ds, REG_GLOBAL, GLOBAL_ATU_MAC_01 + i,  in __mv88e6xxx_write_addr()
1109 		ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL,  in __mv88e6xxx_read_addr()
1135 	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_DATA,  in __mv88e6xxx_port_fdb_cmd()
1195 		ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_DATA);  in __mv88e6xxx_port_getnext()
1323 		REG_WRITE(REG_GLOBAL, 0x04, 0xc000);  in mv88e6xxx_switch_reset()
1325 		REG_WRITE(REG_GLOBAL, 0x04, 0xc400);  in mv88e6xxx_switch_reset()
1330 		ret = REG_READ(REG_GLOBAL, 0x00);  in mv88e6xxx_switch_reset()