291 	struct mram_cfg mcfg[MRAM_CFG_NUM];  member
308 	return readl(priv->mram_base + priv->mcfg[MRAM_RXF0].off +  in m_can_fifo_read()
315 	writel(val, priv->mram_base + priv->mcfg[MRAM_TXB].off +  in m_can_fifo_write()
858 		    priv->mcfg[MRAM_TXB].off);  in m_can_chip_config()
864 		    priv->mcfg[MRAM_TXE].off);  in m_can_chip_config()
868 		    (priv->mcfg[MRAM_RXF0].num << RXFC_FS_OFF) |  in m_can_chip_config()
869 		    RXFC_FWM_1 | priv->mcfg[MRAM_RXF0].off);  in m_can_chip_config()
872 		    (priv->mcfg[MRAM_RXF1].num << RXFC_FS_OFF) |  in m_can_chip_config()
873 		    RXFC_FWM_1 | priv->mcfg[MRAM_RXF1].off);  in m_can_chip_config()
1142 	priv->mcfg[MRAM_SIDF].off = out_val[0];  in m_can_of_parse_mram()
1143 	priv->mcfg[MRAM_SIDF].num = out_val[1];  in m_can_of_parse_mram()
1144 	priv->mcfg[MRAM_XIDF].off = priv->mcfg[MRAM_SIDF].off +  in m_can_of_parse_mram()
1145 			priv->mcfg[MRAM_SIDF].num * SIDF_ELEMENT_SIZE;  in m_can_of_parse_mram()
1146 	priv->mcfg[MRAM_XIDF].num = out_val[2];  in m_can_of_parse_mram()
1147 	priv->mcfg[MRAM_RXF0].off = priv->mcfg[MRAM_XIDF].off +  in m_can_of_parse_mram()
1148 			priv->mcfg[MRAM_XIDF].num * XIDF_ELEMENT_SIZE;  in m_can_of_parse_mram()
1149 	priv->mcfg[MRAM_RXF0].num = out_val[3] & RXFC_FS_MASK;  in m_can_of_parse_mram()
1150 	priv->mcfg[MRAM_RXF1].off = priv->mcfg[MRAM_RXF0].off +  in m_can_of_parse_mram()
1151 			priv->mcfg[MRAM_RXF0].num * RXF0_ELEMENT_SIZE;  in m_can_of_parse_mram()
1152 	priv->mcfg[MRAM_RXF1].num = out_val[4] & RXFC_FS_MASK;  in m_can_of_parse_mram()
1153 	priv->mcfg[MRAM_RXB].off = priv->mcfg[MRAM_RXF1].off +  in m_can_of_parse_mram()
1154 			priv->mcfg[MRAM_RXF1].num * RXF1_ELEMENT_SIZE;  in m_can_of_parse_mram()
1155 	priv->mcfg[MRAM_RXB].num = out_val[5];  in m_can_of_parse_mram()
1156 	priv->mcfg[MRAM_TXE].off = priv->mcfg[MRAM_RXB].off +  in m_can_of_parse_mram()
1157 			priv->mcfg[MRAM_RXB].num * RXB_ELEMENT_SIZE;  in m_can_of_parse_mram()
1158 	priv->mcfg[MRAM_TXE].num = out_val[6];  in m_can_of_parse_mram()
1159 	priv->mcfg[MRAM_TXB].off = priv->mcfg[MRAM_TXE].off +  in m_can_of_parse_mram()
1160 			priv->mcfg[MRAM_TXE].num * TXE_ELEMENT_SIZE;  in m_can_of_parse_mram()
1161 	priv->mcfg[MRAM_TXB].num = out_val[7] & TXBC_NDTB_MASK;  in m_can_of_parse_mram()
1165 		priv->mcfg[MRAM_SIDF].off, priv->mcfg[MRAM_SIDF].num,  in m_can_of_parse_mram()
1166 		priv->mcfg[MRAM_XIDF].off, priv->mcfg[MRAM_XIDF].num,  in m_can_of_parse_mram()
1167 		priv->mcfg[MRAM_RXF0].off, priv->mcfg[MRAM_RXF0].num,  in m_can_of_parse_mram()
1168 		priv->mcfg[MRAM_RXF1].off, priv->mcfg[MRAM_RXF1].num,  in m_can_of_parse_mram()
1169 		priv->mcfg[MRAM_RXB].off, priv->mcfg[MRAM_RXB].num,  in m_can_of_parse_mram()
1170 		priv->mcfg[MRAM_TXE].off, priv->mcfg[MRAM_TXE].num,  in m_can_of_parse_mram()
1171 		priv->mcfg[MRAM_TXB].off, priv->mcfg[MRAM_TXB].num);  in m_can_of_parse_mram()
1176 	start = priv->mcfg[MRAM_SIDF].off;  in m_can_of_parse_mram()
1177 	end = priv->mcfg[MRAM_TXB].off +  in m_can_of_parse_mram()
1178 		priv->mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;  in m_can_of_parse_mram()