103 static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl)  in jz_nand_cmd_ctrl()  argument
127 	if (dat != NAND_CMD_NONE)  in jz_nand_cmd_ctrl()
128 		writeb(dat, chip->IO_ADDR_W);  in jz_nand_cmd_ctrl()
165 static int jz_nand_calculate_ecc_rs(struct mtd_info *mtd, const uint8_t *dat,  in jz_nand_calculate_ecc_rs()  argument
200 static void jz_nand_correct_data(uint8_t *dat, int index, int mask)  in jz_nand_correct_data()  argument
207 	data = dat[index];  in jz_nand_correct_data()
208 	data |= dat[index+1] << 8;  in jz_nand_correct_data()
214 	dat[index] = data & 0xff;  in jz_nand_correct_data()
215 	dat[index+1] = (data >> 8) & 0xff;  in jz_nand_correct_data()
218 static int jz_nand_correct_ecc_rs(struct mtd_info *mtd, uint8_t *dat,  in jz_nand_correct_ecc_rs()  argument
233 		t &= dat[0];  in jz_nand_correct_ecc_rs()
234 		t &= dat[nand->chip.ecc.size / 2];  in jz_nand_correct_ecc_rs()
235 		t &= dat[nand->chip.ecc.size - 1];  in jz_nand_correct_ecc_rs()
239 				t &= dat[i];  in jz_nand_correct_ecc_rs()
273 				jz_nand_correct_data(dat, index, error & 0x1ff);  in jz_nand_correct_ecc_rs()