216 	u32 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()
239 				tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP);  in wmt_mci_read_response()
241 				tmp_resp = readb(priv->sdmmc_base + SDMMC_RSP +  in wmt_mci_read_response()
253 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
271 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
284 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
384 	status0 = readb(priv->sdmmc_base + SDMMC_STS0);  in wmt_mci_regular_isr()
385 	status1 = readb(priv->sdmmc_base + SDMMC_STS1);  in wmt_mci_regular_isr()
386 	status2 = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_mci_regular_isr()
389 	reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_regular_isr()
473 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
477 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
497 	reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
691 	busmode = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_set_ios()
692 	extctrl = readb(priv->sdmmc_base + SDMMC_EXTCTRL);  in wmt_mci_set_ios()
717 	return !(readb(priv->sdmmc_base + SDMMC_STS0) & STS0_WRITE_PROTECT);  in wmt_mci_get_ro()
723 	u32 cd = (readb(priv->sdmmc_base + SDMMC_STS0) & STS0_CD_GPI) >> 3;  in wmt_mci_get_cd()
891 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
934 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_suspend()
959 		reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_resume()
967 		reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_resume()