Lines Matching refs:readl
216 writel(((readl(base) & ~(mask << shift)) | (val << shift)), base); in esdhc_clrset_le()
223 u32 val = readl(host->ioaddr + reg); in esdhc_readl_le()
256 val = readl(host->ioaddr + SDHCI_CAPABILITIES) & 0xFFFF; in esdhc_readl_le()
310 data = readl(host->ioaddr + SDHCI_HOST_CONTROL); in esdhc_writel_le()
322 v = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_writel_le()
365 val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_readw_le()
371 val = readl(host->ioaddr + ESDHC_MIX_CTRL); in esdhc_readw_le()
374 val = readl(host->ioaddr + SDHCI_ACMD12_ERR); in esdhc_readw_le()
389 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL); in esdhc_readw_le()
414 new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_writew_le()
422 new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_writew_le()
429 new_val = readl(host->ioaddr + ESDHC_MIX_CTRL); in esdhc_writew_le()
436 u32 v = readl(host->ioaddr + SDHCI_ACMD12_ERR); in esdhc_writew_le()
437 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL); in esdhc_writew_le()
462 v = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_writew_le()
468 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL); in esdhc_writew_le()
560 new_val = readl(host->ioaddr + ESDHC_MIX_CTRL); in esdhc_writeb_le()
601 val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_pltfm_set_clock()
639 val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_pltfm_set_clock()
657 return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) & in esdhc_pltfm_get_ro()
693 reg = readl(host->ioaddr + ESDHC_MIX_CTRL); in esdhc_prepare_tuning()
700 val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS)); in esdhc_prepare_tuning()
707 reg = readl(host->ioaddr + ESDHC_MIX_CTRL); in esdhc_post_tuning()
794 writel(readl(host->ioaddr + ESDHC_MIX_CTRL) | in esdhc_set_uhs_signaling()
1011 writel(readl(host->ioaddr + ESDHC_TUNING_CTRL) | in sdhci_esdhc_imx_probe()
1120 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); in sdhci_esdhc_imx_remove()