38 	struct rtsx_pcr		*pcr;  member
70 	rtsx_pci_write_register(host->pcr, CARD_STOP,  in sd_clear_error()
87 			rtsx_pci_read_register(host->pcr, start + i + j,  in dump_reg_range()
105 	return rtsx_pci_readl(host->pcr, RTSX_BIPR) & SD_EXIST;  in sd_get_cd_int()
108 static void sd_cmd_set_sd_cmd(struct rtsx_pcr *pcr, struct mmc_command *cmd)  in sd_cmd_set_sd_cmd()  argument
110 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF,  in sd_cmd_set_sd_cmd()
112 	rtsx_pci_write_be32(pcr, SD_CMD1, cmd->arg);  in sd_cmd_set_sd_cmd()
115 static void sd_cmd_set_data_len(struct rtsx_pcr *pcr, u16 blocks, u16 blksz)  in sd_cmd_set_data_len()  argument
117 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, blocks);  in sd_cmd_set_data_len()
118 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, blocks >> 8);  in sd_cmd_set_data_len()
119 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, blksz);  in sd_cmd_set_data_len()
120 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, blksz >> 8);  in sd_cmd_set_data_len()
163 	struct rtsx_pcr *pcr = host->pcr;  in sd_pre_dma_transfer()  local
176 		count = rtsx_pci_dma_map_sg(pcr, data->sg, data->sg_len, read);  in sd_pre_dma_transfer()
215 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_post_req()  local
219 	rtsx_pci_dma_unmap_sg(pcr, data->sg, data->sg_len, read);  in sdmmc_post_req()
226 	struct rtsx_pcr *pcr = host->pcr;  in sd_send_cmd_get_rsp()  local
250 		err = rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sd_send_cmd_get_rsp()
258 	rtsx_pci_init_cmd(pcr);  in sd_send_cmd_get_rsp()
259 	sd_cmd_set_sd_cmd(pcr, cmd);  in sd_send_cmd_get_rsp()
260 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);  in sd_send_cmd_get_rsp()
261 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,  in sd_send_cmd_get_rsp()
263 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER,  in sd_send_cmd_get_rsp()
265 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_send_cmd_get_rsp()
272 			rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0);  in sd_send_cmd_get_rsp()
276 			rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0);  in sd_send_cmd_get_rsp()
279 	rtsx_pci_add_cmd(pcr, READ_REG_CMD, SD_STAT1, 0, 0);  in sd_send_cmd_get_rsp()
281 	err = rtsx_pci_send_cmd(pcr, timeout);  in sd_send_cmd_get_rsp()
296 	ptr = rtsx_pci_get_cmd_data(pcr) + 1;  in sd_send_cmd_get_rsp()
337 		rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sd_send_cmd_get_rsp()
344 	struct rtsx_pcr *pcr = host->pcr;  in sd_read_data()  local
359 	rtsx_pci_init_cmd(pcr);  in sd_read_data()
360 	sd_cmd_set_sd_cmd(pcr, cmd);  in sd_read_data()
361 	sd_cmd_set_data_len(pcr, 1, byte_cnt);  in sd_read_data()
362 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF,  in sd_read_data()
366 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,  in sd_read_data()
369 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER,  in sd_read_data()
371 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_read_data()
374 	err = rtsx_pci_send_cmd(pcr, timeout);  in sd_read_data()
383 		err = rtsx_pci_read_ppbuf(pcr, buf, buf_len);  in sd_read_data()
398 	struct rtsx_pcr *pcr = host->pcr;  in sd_write_data()  local
412 		err = rtsx_pci_write_ppbuf(pcr, buf, buf_len);  in sd_write_data()
420 	rtsx_pci_init_cmd(pcr);  in sd_write_data()
421 	sd_cmd_set_data_len(pcr, 1, byte_cnt);  in sd_write_data()
422 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF,  in sd_write_data()
425 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,  in sd_write_data()
427 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_write_data()
430 	err = rtsx_pci_send_cmd(pcr, timeout);  in sd_write_data()
444 	struct rtsx_pcr *pcr = host->pcr;  in sd_read_long_data()  local
465 	rtsx_pci_init_cmd(pcr);  in sd_read_long_data()
466 	sd_cmd_set_sd_cmd(pcr, cmd);  in sd_read_long_data()
467 	sd_cmd_set_data_len(pcr, data->blocks, data->blksz);  in sd_read_long_data()
468 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0,  in sd_read_long_data()
470 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3,  in sd_read_long_data()
472 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2,  in sd_read_long_data()
474 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1,  in sd_read_long_data()
476 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len);  in sd_read_long_data()
477 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL,  in sd_read_long_data()
480 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,  in sd_read_long_data()
482 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2 | resp_type);  in sd_read_long_data()
483 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,  in sd_read_long_data()
485 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_read_long_data()
487 	rtsx_pci_send_cmd_no_wait(pcr);  in sd_read_long_data()
489 	err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, 1, 10000);  in sd_read_long_data()
502 	struct rtsx_pcr *pcr = host->pcr;  in sd_write_long_data()  local
525 	rtsx_pci_init_cmd(pcr);  in sd_write_long_data()
526 	sd_cmd_set_data_len(pcr, data->blocks, data->blksz);  in sd_write_long_data()
527 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0,  in sd_write_long_data()
529 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3,  in sd_write_long_data()
531 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2,  in sd_write_long_data()
533 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1,  in sd_write_long_data()
535 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len);  in sd_write_long_data()
536 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL,  in sd_write_long_data()
539 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,  in sd_write_long_data()
541 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);  in sd_write_long_data()
542 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,  in sd_write_long_data()
544 	rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER,  in sd_write_long_data()
546 	rtsx_pci_send_cmd_no_wait(pcr);  in sd_write_long_data()
547 	err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, 0, 10000);  in sd_write_long_data()
575 	rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_enable_initial_mode()
581 	rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_disable_initial_mode()
622 	struct rtsx_pcr *pcr = host->pcr;  in sd_change_phase()  local
628 	rtsx_pci_init_cmd(pcr);  in sd_change_phase()
630 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CHANGE_CLK, CHANGE_CLK);  in sd_change_phase()
632 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,  in sd_change_phase()
635 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,  in sd_change_phase()
637 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);  in sd_change_phase()
638 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL,  in sd_change_phase()
640 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CHANGE_CLK, 0);  in sd_change_phase()
641 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);  in sd_change_phase()
643 	err = rtsx_pci_send_cmd(pcr, 100);  in sd_change_phase()
700 		err = rtsx_pci_read_register(host->pcr, SD_DATA_STATE, &val);  in sd_wait_data_idle()
803 	struct rtsx_pcr *pcr = host->pcr;  in sd_request()  local
818 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sd_request()
824 	mutex_lock(&pcr->pcr_mutex);  in sd_request()
826 	rtsx_pci_start_run(pcr);  in sd_request()
828 	rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth,  in sd_request()
830 	rtsx_pci_write_register(pcr, CARD_SELECT, 0x07, SD_MOD_SEL);  in sd_request()
831 	rtsx_pci_write_register(pcr, CARD_SHARE_MODE,  in sd_request()
861 	mutex_unlock(&pcr->pcr_mutex);  in sd_request()
902 		err = rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_set_bus_width()
910 	struct rtsx_pcr *pcr = host->pcr;  in sd_power_on()  local
916 	rtsx_pci_init_cmd(pcr);  in sd_power_on()
917 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);  in sd_power_on()
918 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SHARE_MODE,  in sd_power_on()
920 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN,  in sd_power_on()
922 	err = rtsx_pci_send_cmd(pcr, 100);  in sd_power_on()
926 	err = rtsx_pci_card_pull_ctl_enable(pcr, RTSX_SD_CARD);  in sd_power_on()
930 	err = rtsx_pci_card_power_on(pcr, RTSX_SD_CARD);  in sd_power_on()
934 	err = rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN);  in sd_power_on()
944 	struct rtsx_pcr *pcr = host->pcr;  in sd_power_off()  local
949 	rtsx_pci_init_cmd(pcr);  in sd_power_off()
951 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);  in sd_power_off()
952 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);  in sd_power_off()
954 	err = rtsx_pci_send_cmd(pcr, 100);  in sd_power_off()
958 	err = rtsx_pci_card_power_off(pcr, RTSX_SD_CARD);  in sd_power_off()
962 	return rtsx_pci_card_pull_ctl_disable(pcr, RTSX_SD_CARD);  in sd_power_off()
980 	struct rtsx_pcr *pcr = host->pcr;  in sd_set_timing()  local
983 	rtsx_pci_init_cmd(pcr);  in sd_set_timing()
988 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1,  in sd_set_timing()
991 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,  in sd_set_timing()
993 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,  in sd_set_timing()
995 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_timing()
1000 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1,  in sd_set_timing()
1003 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,  in sd_set_timing()
1005 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,  in sd_set_timing()
1007 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_timing()
1008 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,  in sd_set_timing()
1010 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,  in sd_set_timing()
1017 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1,  in sd_set_timing()
1019 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,  in sd_set_timing()
1021 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,  in sd_set_timing()
1023 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_timing()
1024 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,  in sd_set_timing()
1026 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,  in sd_set_timing()
1031 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,  in sd_set_timing()
1033 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL,  in sd_set_timing()
1035 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,  in sd_set_timing()
1037 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_timing()
1038 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,  in sd_set_timing()
1040 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,  in sd_set_timing()
1045 	err = rtsx_pci_send_cmd(pcr, 100);  in sd_set_timing()
1053 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_set_ios()  local
1058 	if (rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD))  in sdmmc_set_ios()
1061 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_set_ios()
1063 	rtsx_pci_start_run(pcr);  in sdmmc_set_ios()
1092 	rtsx_pci_switch_clock(pcr, ios->clock, host->ssc_depth,  in sdmmc_set_ios()
1095 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_set_ios()
1101 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_get_ro()  local
1108 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_get_ro()
1110 	rtsx_pci_start_run(pcr);  in sdmmc_get_ro()
1113 	val = rtsx_pci_readl(pcr, RTSX_BIPR);  in sdmmc_get_ro()
1118 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_get_ro()
1126 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_get_cd()  local
1133 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_get_cd()
1135 	rtsx_pci_start_run(pcr);  in sdmmc_get_cd()
1138 	val = rtsx_pci_card_exist(pcr);  in sdmmc_get_cd()
1143 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_get_cd()
1150 	struct rtsx_pcr *pcr = host->pcr;  in sd_wait_voltage_stable_1()  local
1164 	err = rtsx_pci_read_register(pcr, SD_BUS_STAT, &stat);  in sd_wait_voltage_stable_1()
1173 	err = rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sd_wait_voltage_stable_1()
1183 	struct rtsx_pcr *pcr = host->pcr;  in sd_wait_voltage_stable_2()  local
1191 	err = rtsx_pci_write_register(pcr, SD_BUS_STAT, 0xFF, SD_CLK_TOGGLE_EN);  in sd_wait_voltage_stable_2()
1201 	err = rtsx_pci_read_register(pcr, SD_BUS_STAT, &stat);  in sd_wait_voltage_stable_2()
1212 		rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sd_wait_voltage_stable_2()
1214 		rtsx_pci_write_register(pcr, CARD_CLK_EN, 0xFF, 0);  in sd_wait_voltage_stable_2()
1224 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_switch_voltage()  local
1234 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sdmmc_switch_voltage()
1238 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_switch_voltage()
1240 	rtsx_pci_start_run(pcr);  in sdmmc_switch_voltage()
1253 	err = rtsx_pci_switch_output_voltage(pcr, voltage);  in sdmmc_switch_voltage()
1265 	err = rtsx_pci_write_register(pcr, SD_BUS_STAT,  in sdmmc_switch_voltage()
1268 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_switch_voltage()
1276 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_execute_tuning()  local
1282 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sdmmc_execute_tuning()
1286 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_execute_tuning()
1288 	rtsx_pci_start_run(pcr);  in sdmmc_execute_tuning()
1293 		err = sd_change_phase(host, SDR104_TX_PHASE(pcr), false);  in sdmmc_execute_tuning()
1297 		err = sd_change_phase(host, SDR50_TX_PHASE(pcr), false);  in sdmmc_execute_tuning()
1301 		err = sd_change_phase(host, DDR50_TX_PHASE(pcr), false);  in sdmmc_execute_tuning()
1316 		err = sd_change_phase(host, DDR50_RX_PHASE(pcr), true);  in sdmmc_execute_tuning()
1319 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_execute_tuning()
1338 	struct rtsx_pcr *pcr = host->pcr;  in init_extra_caps()  local
1340 	dev_dbg(sdmmc_dev(host), "pcr->extra_caps = 0x%x\n", pcr->extra_caps);  in init_extra_caps()
1342 	if (pcr->extra_caps & EXTRA_CAPS_SD_SDR50)  in init_extra_caps()
1344 	if (pcr->extra_caps & EXTRA_CAPS_SD_SDR104)  in init_extra_caps()
1346 	if (pcr->extra_caps & EXTRA_CAPS_SD_DDR50)  in init_extra_caps()
1348 	if (pcr->extra_caps & EXTRA_CAPS_MMC_HSDDR)  in init_extra_caps()
1350 	if (pcr->extra_caps & EXTRA_CAPS_MMC_8BIT)  in init_extra_caps()
1390 	struct rtsx_pcr *pcr;  in rtsx_pci_sdmmc_drv_probe()  local
1396 	pcr = handle->pcr;  in rtsx_pci_sdmmc_drv_probe()
1397 	if (!pcr)  in rtsx_pci_sdmmc_drv_probe()
1412 	host->pcr = pcr;  in rtsx_pci_sdmmc_drv_probe()
1419 	pcr->slots[RTSX_SD_CARD].p_dev = pdev;  in rtsx_pci_sdmmc_drv_probe()
1420 	pcr->slots[RTSX_SD_CARD].card_event = rtsx_pci_sdmmc_card_event;  in rtsx_pci_sdmmc_drv_probe()
1434 	struct rtsx_pcr *pcr;  in rtsx_pci_sdmmc_drv_remove()  local
1440 	pcr = host->pcr;  in rtsx_pci_sdmmc_drv_remove()
1441 	pcr->slots[RTSX_SD_CARD].p_dev = NULL;  in rtsx_pci_sdmmc_drv_remove()
1442 	pcr->slots[RTSX_SD_CARD].card_event = NULL;  in rtsx_pci_sdmmc_drv_remove()
1453 		rtsx_pci_complete_unfinished_transfer(pcr);  in rtsx_pci_sdmmc_drv_remove()