Lines Matching refs:DAVINCI_MMCCTL
46 #define DAVINCI_MMCCTL 0x00 /* Control Register */ macro
754 writel((readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
756 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
761 writel((readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
763 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
765 writel(readl(host->base + DAVINCI_MMCCTL) | in mmc_davinci_set_ios()
767 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
772 writel(readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
774 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
776 writel(readl(host->base + DAVINCI_MMCCTL) & in mmc_davinci_set_ios()
778 host->base + DAVINCI_MMCCTL); in mmc_davinci_set_ios()
877 temp = readl(host->base + DAVINCI_MMCCTL); in mmc_davinci_reset_ctrl()
883 writel(temp, host->base + DAVINCI_MMCCTL); in mmc_davinci_reset_ctrl()