48 	mic_mmio_write(&mdev->mmio, val,  in mic_x100_write_spad()
65 	u32 val = mic_mmio_read(&mdev->mmio,  in mic_x100_read_spad()
81 	struct mic_mw *mw = &mdev->mmio;  in mic_x100_enable_interrupts()
108 	struct mic_mw *mw = &mdev->mmio;  in mic_x100_disable_interrupts()
131 	struct mic_mw *mw = &mdev->mmio;  in mic_x100_send_sbox_intr()
155 	mic_mmio_write(&mdev->mmio, 0,  in mic_x100_send_rdmasr_intr()
186 	u32 reg = mic_mmio_read(&mdev->mmio, sicr0);  in mic_x100_ack_interrupt()
187 	mic_mmio_write(&mdev->mmio, reg, sicr0);  in mic_x100_ack_interrupt()
200 	struct mic_mw *mw = &mdev->mmio;  in mic_x100_intr_workarounds()
233 	return mic_mmio_read(&mdev->mmio,  in mic_x100_read_msi_to_src_map()
253 	struct mic_mw *mw = &mdev->mmio;  in mic_x100_program_msi_to_src_map()
305 	struct mic_mw *mw = &mdev->mmio;  in mic_x100_send_firmware_intr()
330 	struct mic_mw *mw = &mdev->mmio;  in mic_x100_hw_reset()
501 	return mic_mmio_read(&mdev->mmio, MIC_X100_POSTCODE);  in mic_x100_get_postcode()
526 	mic_mmio_write(&mdev->mmio, smpt_reg_val,  in mic_x100_smpt_set()