Lines Matching refs:pcr
68 static inline void rtsx_pci_enable_aspm(struct rtsx_pcr *pcr) in rtsx_pci_enable_aspm() argument
70 rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, in rtsx_pci_enable_aspm()
71 0xFC, pcr->aspm_en); in rtsx_pci_enable_aspm()
74 static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr) in rtsx_pci_disable_aspm() argument
76 rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL, in rtsx_pci_disable_aspm()
80 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
83 if (pcr->remove_pci) in rtsx_pci_start_run()
86 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
87 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
88 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
89 pcr->ops->enable_auto_blink(pcr); in rtsx_pci_start_run()
91 if (pcr->aspm_en) in rtsx_pci_start_run()
92 rtsx_pci_disable_aspm(pcr); in rtsx_pci_start_run()
95 mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_start_run()
99 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) in rtsx_pci_write_register() argument
108 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_write_register()
111 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_write_register()
123 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) in rtsx_pci_read_register() argument
129 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_read_register()
132 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_read_register()
147 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in __rtsx_pci_write_phy_register() argument
152 rtsx_pci_init_cmd(pcr); in __rtsx_pci_write_phy_register()
154 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYDATA0, 0xFF, (u8)val); in __rtsx_pci_write_phy_register()
155 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYDATA1, 0xFF, (u8)(val >> 8)); in __rtsx_pci_write_phy_register()
156 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYADDR, 0xFF, addr); in __rtsx_pci_write_phy_register()
157 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYRWCTL, 0xFF, 0x81); in __rtsx_pci_write_phy_register()
159 err = rtsx_pci_send_cmd(pcr, 100); in __rtsx_pci_write_phy_register()
164 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_write_phy_register()
180 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in rtsx_pci_write_phy_register() argument
182 if (pcr->ops->write_phy) in rtsx_pci_write_phy_register()
183 return pcr->ops->write_phy(pcr, addr, val); in rtsx_pci_write_phy_register()
185 return __rtsx_pci_write_phy_register(pcr, addr, val); in rtsx_pci_write_phy_register()
189 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in __rtsx_pci_read_phy_register() argument
195 rtsx_pci_init_cmd(pcr); in __rtsx_pci_read_phy_register()
197 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYADDR, 0xFF, addr); in __rtsx_pci_read_phy_register()
198 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PHYRWCTL, 0xFF, 0x80); in __rtsx_pci_read_phy_register()
200 err = rtsx_pci_send_cmd(pcr, 100); in __rtsx_pci_read_phy_register()
205 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_read_phy_register()
218 rtsx_pci_init_cmd(pcr); in __rtsx_pci_read_phy_register()
220 rtsx_pci_add_cmd(pcr, READ_REG_CMD, PHYDATA0, 0, 0); in __rtsx_pci_read_phy_register()
221 rtsx_pci_add_cmd(pcr, READ_REG_CMD, PHYDATA1, 0, 0); in __rtsx_pci_read_phy_register()
223 err = rtsx_pci_send_cmd(pcr, 100); in __rtsx_pci_read_phy_register()
227 ptr = rtsx_pci_get_cmd_data(pcr); in __rtsx_pci_read_phy_register()
236 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in rtsx_pci_read_phy_register() argument
238 if (pcr->ops->read_phy) in rtsx_pci_read_phy_register()
239 return pcr->ops->read_phy(pcr, addr, val); in rtsx_pci_read_phy_register()
241 return __rtsx_pci_read_phy_register(pcr, addr, val); in rtsx_pci_read_phy_register()
245 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) in rtsx_pci_stop_cmd() argument
247 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rtsx_pci_stop_cmd()
248 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rtsx_pci_stop_cmd()
250 rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
251 rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
255 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, in rtsx_pci_add_cmd() argument
260 u32 *ptr = (u32 *)(pcr->host_cmds_ptr); in rtsx_pci_add_cmd()
267 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_add_cmd()
268 ptr += pcr->ci; in rtsx_pci_add_cmd()
269 if (pcr->ci < (HOST_CMDS_BUF_LEN / 4)) { in rtsx_pci_add_cmd()
272 pcr->ci++; in rtsx_pci_add_cmd()
274 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_add_cmd()
278 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr) in rtsx_pci_send_cmd_no_wait() argument
282 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd_no_wait()
284 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd_no_wait()
287 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd_no_wait()
291 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) in rtsx_pci_send_cmd() argument
299 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
302 pcr->done = &trans_done; in rtsx_pci_send_cmd()
303 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_send_cmd()
306 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd()
308 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd()
311 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd()
313 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
319 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_send_cmd()
324 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
325 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_send_cmd()
327 else if (pcr->trans_result == TRANS_RESULT_OK) in rtsx_pci_send_cmd()
329 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_send_cmd()
331 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
334 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
335 pcr->done = NULL; in rtsx_pci_send_cmd()
336 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
339 rtsx_pci_stop_cmd(pcr); in rtsx_pci_send_cmd()
341 if (pcr->finish_me) in rtsx_pci_send_cmd()
342 complete(pcr->finish_me); in rtsx_pci_send_cmd()
348 static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, in rtsx_pci_add_sg_tbl() argument
351 u64 *ptr = (u64 *)(pcr->host_sg_tbl_ptr) + pcr->sgi; in rtsx_pci_add_sg_tbl()
355 pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len); in rtsx_pci_add_sg_tbl()
362 pcr->sgi++; in rtsx_pci_add_sg_tbl()
365 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_transfer_data() argument
370 pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg); in rtsx_pci_transfer_data()
371 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
374 pcr_dbg(pcr, "DMA mapping count: %d\n", count); in rtsx_pci_transfer_data()
376 err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); in rtsx_pci_transfer_data()
378 rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
384 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_map_sg() argument
389 if (pcr->remove_pci) in rtsx_pci_dma_map_sg()
395 return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_map_sg()
399 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_unmap_sg() argument
404 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_unmap_sg()
408 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_transfer() argument
421 if (pcr->remove_pci) in rtsx_pci_dma_transfer()
428 pcr->sgi = 0; in rtsx_pci_dma_transfer()
432 rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); in rtsx_pci_dma_transfer()
435 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
437 pcr->done = &trans_done; in rtsx_pci_dma_transfer()
438 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_dma_transfer()
440 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); in rtsx_pci_dma_transfer()
441 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); in rtsx_pci_dma_transfer()
443 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
448 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_dma_transfer()
453 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
454 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_dma_transfer()
456 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_dma_transfer()
458 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
461 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
462 pcr->done = NULL; in rtsx_pci_dma_transfer()
463 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
466 rtsx_pci_stop_cmd(pcr); in rtsx_pci_dma_transfer()
468 if (pcr->finish_me) in rtsx_pci_dma_transfer()
469 complete(pcr->finish_me); in rtsx_pci_dma_transfer()
475 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_read_ppbuf() argument
488 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
491 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
493 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
497 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), 256); in rtsx_pci_read_ppbuf()
502 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
505 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
507 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
512 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), buf_len % 256); in rtsx_pci_read_ppbuf()
518 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_write_ppbuf() argument
531 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
534 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
539 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
545 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
548 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
553 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
562 static int rtsx_pci_set_pull_ctl(struct rtsx_pcr *pcr, const u32 *tbl) in rtsx_pci_set_pull_ctl() argument
566 rtsx_pci_init_cmd(pcr); in rtsx_pci_set_pull_ctl()
569 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_set_pull_ctl()
574 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_set_pull_ctl()
581 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_enable() argument
586 tbl = pcr->sd_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
588 tbl = pcr->ms_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
592 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_enable()
596 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_disable() argument
601 tbl = pcr->sd_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
603 tbl = pcr->ms_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
608 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_disable()
612 static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) in rtsx_pci_enable_bus_int() argument
614 pcr->bier = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN | SD_INT_EN; in rtsx_pci_enable_bus_int()
616 if (pcr->num_slots > 1) in rtsx_pci_enable_bus_int()
617 pcr->bier |= MS_INT_EN; in rtsx_pci_enable_bus_int()
620 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); in rtsx_pci_enable_bus_int()
622 pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier); in rtsx_pci_enable_bus_int()
642 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rtsx_pci_switch_clock() argument
662 err = rtsx_pci_write_register(pcr, SD_CFG1, in rtsx_pci_switch_clock()
668 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rtsx_pci_switch_clock()
673 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rtsx_pci_switch_clock()
674 clk, pcr->cur_clock); in rtsx_pci_switch_clock()
676 if (clk == pcr->cur_clock) in rtsx_pci_switch_clock()
679 if (pcr->ops->conv_clk_and_div_n) in rtsx_pci_switch_clock()
680 n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rtsx_pci_switch_clock()
693 if (pcr->ops->conv_clk_and_div_n) { in rtsx_pci_switch_clock()
694 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rtsx_pci_switch_clock()
696 n = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, in rtsx_pci_switch_clock()
703 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rtsx_pci_switch_clock()
710 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rtsx_pci_switch_clock()
712 rtsx_pci_init_cmd(pcr); in rtsx_pci_switch_clock()
713 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
715 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rtsx_pci_switch_clock()
717 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_switch_clock()
718 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rtsx_pci_switch_clock()
720 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rtsx_pci_switch_clock()
721 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rtsx_pci_switch_clock()
723 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
725 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
729 err = rtsx_pci_send_cmd(pcr, 2000); in rtsx_pci_switch_clock()
735 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
739 pcr->cur_clock = clk; in rtsx_pci_switch_clock()
744 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_on() argument
746 if (pcr->ops->card_power_on) in rtsx_pci_card_power_on()
747 return pcr->ops->card_power_on(pcr, card); in rtsx_pci_card_power_on()
753 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_off() argument
755 if (pcr->ops->card_power_off) in rtsx_pci_card_power_off()
756 return pcr->ops->card_power_off(pcr, card); in rtsx_pci_card_power_off()
762 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_exclusive_check() argument
769 if (!(pcr->flags & PCR_MS_PMOS)) { in rtsx_pci_card_exclusive_check()
773 if (pcr->card_exist & (~cd_mask[card])) in rtsx_pci_card_exclusive_check()
781 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rtsx_pci_switch_output_voltage() argument
783 if (pcr->ops->switch_output_voltage) in rtsx_pci_switch_output_voltage()
784 return pcr->ops->switch_output_voltage(pcr, voltage); in rtsx_pci_switch_output_voltage()
790 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr) in rtsx_pci_card_exist() argument
794 val = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_exist()
795 if (pcr->ops->cd_deglitch) in rtsx_pci_card_exist()
796 val = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_exist()
802 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr) in rtsx_pci_complete_unfinished_transfer() argument
806 pcr->finish_me = &finish; in rtsx_pci_complete_unfinished_transfer()
809 if (pcr->done) in rtsx_pci_complete_unfinished_transfer()
810 complete(pcr->done); in rtsx_pci_complete_unfinished_transfer()
812 if (!pcr->remove_pci) in rtsx_pci_complete_unfinished_transfer()
813 rtsx_pci_stop_cmd(pcr); in rtsx_pci_complete_unfinished_transfer()
817 pcr->finish_me = NULL; in rtsx_pci_complete_unfinished_transfer()
824 struct rtsx_pcr *pcr; in rtsx_pci_card_detect() local
830 pcr = container_of(dwork, struct rtsx_pcr, carddet_work); in rtsx_pci_card_detect()
832 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_card_detect()
834 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
835 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_card_detect()
837 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_detect()
838 pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status); in rtsx_pci_card_detect()
841 card_inserted = pcr->card_inserted & irq_status; in rtsx_pci_card_detect()
842 card_removed = pcr->card_removed; in rtsx_pci_card_detect()
843 pcr->card_inserted = 0; in rtsx_pci_card_detect()
844 pcr->card_removed = 0; in rtsx_pci_card_detect()
846 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_card_detect()
849 pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n", in rtsx_pci_card_detect()
852 if (pcr->ops->cd_deglitch) in rtsx_pci_card_detect()
853 card_inserted = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_detect()
857 pcr->card_exist |= card_inserted; in rtsx_pci_card_detect()
858 pcr->card_exist &= ~card_removed; in rtsx_pci_card_detect()
861 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
863 if ((card_detect & SD_EXIST) && pcr->slots[RTSX_SD_CARD].card_event) in rtsx_pci_card_detect()
864 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_card_detect()
865 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_card_detect()
866 if ((card_detect & MS_EXIST) && pcr->slots[RTSX_MS_CARD].card_event) in rtsx_pci_card_detect()
867 pcr->slots[RTSX_MS_CARD].card_event( in rtsx_pci_card_detect()
868 pcr->slots[RTSX_MS_CARD].p_dev); in rtsx_pci_card_detect()
873 struct rtsx_pcr *pcr = dev_id; in rtsx_pci_isr() local
876 if (!pcr) in rtsx_pci_isr()
879 spin_lock(&pcr->lock); in rtsx_pci_isr()
881 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_isr()
883 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); in rtsx_pci_isr()
884 if ((int_reg & pcr->bier) == 0) { in rtsx_pci_isr()
885 spin_unlock(&pcr->lock); in rtsx_pci_isr()
889 spin_unlock(&pcr->lock); in rtsx_pci_isr()
893 int_reg &= (pcr->bier | 0x7FFFFF); in rtsx_pci_isr()
897 pcr->card_inserted |= SD_EXIST; in rtsx_pci_isr()
899 pcr->card_removed |= SD_EXIST; in rtsx_pci_isr()
900 pcr->card_inserted &= ~SD_EXIST; in rtsx_pci_isr()
906 pcr->card_inserted |= MS_EXIST; in rtsx_pci_isr()
908 pcr->card_removed |= MS_EXIST; in rtsx_pci_isr()
909 pcr->card_inserted &= ~MS_EXIST; in rtsx_pci_isr()
915 pcr->trans_result = TRANS_RESULT_FAIL; in rtsx_pci_isr()
916 if (pcr->done) in rtsx_pci_isr()
917 complete(pcr->done); in rtsx_pci_isr()
919 pcr->trans_result = TRANS_RESULT_OK; in rtsx_pci_isr()
920 if (pcr->done) in rtsx_pci_isr()
921 complete(pcr->done); in rtsx_pci_isr()
925 if (pcr->card_inserted || pcr->card_removed) in rtsx_pci_isr()
926 schedule_delayed_work(&pcr->carddet_work, in rtsx_pci_isr()
929 spin_unlock(&pcr->lock); in rtsx_pci_isr()
933 static int rtsx_pci_acquire_irq(struct rtsx_pcr *pcr) in rtsx_pci_acquire_irq() argument
935 dev_info(&(pcr->pci->dev), "%s: pcr->msi_en = %d, pci->irq = %d\n", in rtsx_pci_acquire_irq()
936 __func__, pcr->msi_en, pcr->pci->irq); in rtsx_pci_acquire_irq()
938 if (request_irq(pcr->pci->irq, rtsx_pci_isr, in rtsx_pci_acquire_irq()
939 pcr->msi_en ? 0 : IRQF_SHARED, in rtsx_pci_acquire_irq()
940 DRV_NAME_RTSX_PCI, pcr)) { in rtsx_pci_acquire_irq()
941 dev_err(&(pcr->pci->dev), in rtsx_pci_acquire_irq()
943 pcr->pci->irq); in rtsx_pci_acquire_irq()
947 pcr->irq = pcr->pci->irq; in rtsx_pci_acquire_irq()
948 pci_intx(pcr->pci, !pcr->msi_en); in rtsx_pci_acquire_irq()
956 struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work); in rtsx_pci_idle_work() local
958 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_idle_work()
960 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
962 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_idle_work()
964 if (pcr->ops->disable_auto_blink) in rtsx_pci_idle_work()
965 pcr->ops->disable_auto_blink(pcr); in rtsx_pci_idle_work()
966 if (pcr->ops->turn_off_led) in rtsx_pci_idle_work()
967 pcr->ops->turn_off_led(pcr); in rtsx_pci_idle_work()
969 if (pcr->aspm_en) in rtsx_pci_idle_work()
970 rtsx_pci_enable_aspm(pcr); in rtsx_pci_idle_work()
972 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
976 static void rtsx_pci_power_off(struct rtsx_pcr *pcr, u8 pm_state) in rtsx_pci_power_off() argument
978 if (pcr->ops->turn_off_led) in rtsx_pci_power_off()
979 pcr->ops->turn_off_led(pcr); in rtsx_pci_power_off()
981 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_power_off()
982 pcr->bier = 0; in rtsx_pci_power_off()
984 rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08); in rtsx_pci_power_off()
985 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, pm_state); in rtsx_pci_power_off()
987 if (pcr->ops->force_power_down) in rtsx_pci_power_off()
988 pcr->ops->force_power_down(pcr, pm_state); in rtsx_pci_power_off()
992 static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) in rtsx_pci_init_hw() argument
996 pcr->pcie_cap = pci_find_capability(pcr->pci, PCI_CAP_ID_EXP); in rtsx_pci_init_hw()
997 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_init_hw()
999 rtsx_pci_enable_bus_int(pcr); in rtsx_pci_init_hw()
1002 err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0); in rtsx_pci_init_hw()
1009 rtsx_pci_disable_aspm(pcr); in rtsx_pci_init_hw()
1010 if (pcr->ops->optimize_phy) { in rtsx_pci_init_hw()
1011 err = pcr->ops->optimize_phy(pcr); in rtsx_pci_init_hw()
1016 rtsx_pci_init_cmd(pcr); in rtsx_pci_init_hw()
1019 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, 0x07, 0x07); in rtsx_pci_init_hw()
1021 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_init_hw()
1023 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); in rtsx_pci_init_hw()
1025 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); in rtsx_pci_init_hw()
1027 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DRIVE_SEL, in rtsx_pci_init_hw()
1028 0xFF, pcr->card_drive_sel); in rtsx_pci_init_hw()
1030 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, in rtsx_pci_init_hw()
1032 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); in rtsx_pci_init_hw()
1034 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x16, 0x10); in rtsx_pci_init_hw()
1036 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in rtsx_pci_init_hw()
1041 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PERST_GLITCH_WIDTH, 0xFF, 0x80); in rtsx_pci_init_hw()
1046 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RCCTL, 0x01, 0x00); in rtsx_pci_init_hw()
1052 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); in rtsx_pci_init_hw()
1054 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_init_hw()
1059 rtsx_pci_write_config_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL + 1, 1); in rtsx_pci_init_hw()
1061 rtsx_pci_write_config_byte(pcr, 0x70F, 0x5B); in rtsx_pci_init_hw()
1063 if (pcr->ops->extra_init_hw) { in rtsx_pci_init_hw()
1064 err = pcr->ops->extra_init_hw(pcr); in rtsx_pci_init_hw()
1072 if (pcr->ops->cd_deglitch) in rtsx_pci_init_hw()
1073 pcr->card_exist = pcr->ops->cd_deglitch(pcr); in rtsx_pci_init_hw()
1075 pcr->card_exist = rtsx_pci_readl(pcr, RTSX_BIPR) & CARD_EXIST; in rtsx_pci_init_hw()
1080 static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) in rtsx_pci_init_chip() argument
1084 spin_lock_init(&pcr->lock); in rtsx_pci_init_chip()
1085 mutex_init(&pcr->pcr_mutex); in rtsx_pci_init_chip()
1087 switch (PCI_PID(pcr)) { in rtsx_pci_init_chip()
1090 rts5209_init_params(pcr); in rtsx_pci_init_chip()
1094 rts5229_init_params(pcr); in rtsx_pci_init_chip()
1098 rtl8411_init_params(pcr); in rtsx_pci_init_chip()
1102 rts5227_init_params(pcr); in rtsx_pci_init_chip()
1106 rts5249_init_params(pcr); in rtsx_pci_init_chip()
1110 rts524a_init_params(pcr); in rtsx_pci_init_chip()
1114 rts525a_init_params(pcr); in rtsx_pci_init_chip()
1118 rtl8411b_init_params(pcr); in rtsx_pci_init_chip()
1122 rtl8402_init_params(pcr); in rtsx_pci_init_chip()
1126 pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n", in rtsx_pci_init_chip()
1127 PCI_PID(pcr), pcr->ic_version); in rtsx_pci_init_chip()
1129 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), in rtsx_pci_init_chip()
1131 if (!pcr->slots) in rtsx_pci_init_chip()
1134 if (pcr->ops->fetch_vendor_settings) in rtsx_pci_init_chip()
1135 pcr->ops->fetch_vendor_settings(pcr); in rtsx_pci_init_chip()
1137 pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en); in rtsx_pci_init_chip()
1138 pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n", in rtsx_pci_init_chip()
1139 pcr->sd30_drive_sel_1v8); in rtsx_pci_init_chip()
1140 pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n", in rtsx_pci_init_chip()
1141 pcr->sd30_drive_sel_3v3); in rtsx_pci_init_chip()
1142 pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n", in rtsx_pci_init_chip()
1143 pcr->card_drive_sel); in rtsx_pci_init_chip()
1144 pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags); in rtsx_pci_init_chip()
1146 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_init_chip()
1147 err = rtsx_pci_init_hw(pcr); in rtsx_pci_init_chip()
1149 kfree(pcr->slots); in rtsx_pci_init_chip()
1159 struct rtsx_pcr *pcr; in rtsx_pci_probe() local
1181 pcr = kzalloc(sizeof(*pcr), GFP_KERNEL); in rtsx_pci_probe()
1182 if (!pcr) { in rtsx_pci_probe()
1192 handle->pcr = pcr; in rtsx_pci_probe()
1196 ret = idr_alloc(&rtsx_pci_idr, pcr, 0, 0, GFP_NOWAIT); in rtsx_pci_probe()
1198 pcr->id = ret; in rtsx_pci_probe()
1204 pcr->pci = pcidev; in rtsx_pci_probe()
1207 if (CHK_PCI_PID(pcr, 0x525A)) in rtsx_pci_probe()
1211 pcr->remap_addr = ioremap_nocache(base, len); in rtsx_pci_probe()
1212 if (!pcr->remap_addr) { in rtsx_pci_probe()
1217 pcr->rtsx_resv_buf = dma_alloc_coherent(&(pcidev->dev), in rtsx_pci_probe()
1218 RTSX_RESV_BUF_LEN, &(pcr->rtsx_resv_buf_addr), in rtsx_pci_probe()
1220 if (pcr->rtsx_resv_buf == NULL) { in rtsx_pci_probe()
1224 pcr->host_cmds_ptr = pcr->rtsx_resv_buf; in rtsx_pci_probe()
1225 pcr->host_cmds_addr = pcr->rtsx_resv_buf_addr; in rtsx_pci_probe()
1226 pcr->host_sg_tbl_ptr = pcr->rtsx_resv_buf + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1227 pcr->host_sg_tbl_addr = pcr->rtsx_resv_buf_addr + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1229 pcr->card_inserted = 0; in rtsx_pci_probe()
1230 pcr->card_removed = 0; in rtsx_pci_probe()
1231 INIT_DELAYED_WORK(&pcr->carddet_work, rtsx_pci_card_detect); in rtsx_pci_probe()
1232 INIT_DELAYED_WORK(&pcr->idle_work, rtsx_pci_idle_work); in rtsx_pci_probe()
1234 pcr->msi_en = msi_en; in rtsx_pci_probe()
1235 if (pcr->msi_en) { in rtsx_pci_probe()
1238 pcr->msi_en = false; in rtsx_pci_probe()
1241 ret = rtsx_pci_acquire_irq(pcr); in rtsx_pci_probe()
1246 synchronize_irq(pcr->irq); in rtsx_pci_probe()
1248 ret = rtsx_pci_init_chip(pcr); in rtsx_pci_probe()
1256 ret = mfd_add_devices(&pcidev->dev, pcr->id, rtsx_pcr_cells, in rtsx_pci_probe()
1261 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_probe()
1266 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_probe()
1268 if (pcr->msi_en) in rtsx_pci_probe()
1269 pci_disable_msi(pcr->pci); in rtsx_pci_probe()
1270 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_probe()
1271 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_probe()
1273 iounmap(pcr->remap_addr); in rtsx_pci_probe()
1277 kfree(pcr); in rtsx_pci_probe()
1289 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_remove() local
1291 pcr->remove_pci = true; in rtsx_pci_remove()
1294 spin_lock_irq(&pcr->lock); in rtsx_pci_remove()
1295 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_remove()
1296 pcr->bier = 0; in rtsx_pci_remove()
1297 spin_unlock_irq(&pcr->lock); in rtsx_pci_remove()
1299 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_remove()
1300 cancel_delayed_work_sync(&pcr->idle_work); in rtsx_pci_remove()
1304 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_remove()
1305 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_remove()
1306 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_remove()
1307 if (pcr->msi_en) in rtsx_pci_remove()
1308 pci_disable_msi(pcr->pci); in rtsx_pci_remove()
1309 iounmap(pcr->remap_addr); in rtsx_pci_remove()
1315 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_remove()
1318 kfree(pcr->slots); in rtsx_pci_remove()
1319 kfree(pcr); in rtsx_pci_remove()
1332 struct rtsx_pcr *pcr; in rtsx_pci_suspend() local
1337 pcr = handle->pcr; in rtsx_pci_suspend()
1339 cancel_delayed_work(&pcr->carddet_work); in rtsx_pci_suspend()
1340 cancel_delayed_work(&pcr->idle_work); in rtsx_pci_suspend()
1342 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1344 rtsx_pci_power_off(pcr, HOST_ENTER_S3); in rtsx_pci_suspend()
1351 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1358 struct rtsx_pcr *pcr; in rtsx_pci_resume() local
1364 pcr = handle->pcr; in rtsx_pci_resume()
1366 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_resume()
1375 ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_resume()
1379 ret = rtsx_pci_init_hw(pcr); in rtsx_pci_resume()
1383 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_resume()
1386 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_resume()
1393 struct rtsx_pcr *pcr; in rtsx_pci_shutdown() local
1398 pcr = handle->pcr; in rtsx_pci_shutdown()
1399 rtsx_pci_power_off(pcr, HOST_ENTER_S1); in rtsx_pci_shutdown()