213 	int i;  in rc5t583_irq_sync_unlock()  local
216 	for (i = 0; i < ARRAY_SIZE(rc5t583->gpedge_reg); i++) {  in rc5t583_irq_sync_unlock()
217 		ret = rc5t583_write(rc5t583->dev, gpedge_add[i],  in rc5t583_irq_sync_unlock()
218 				rc5t583->gpedge_reg[i]);  in rc5t583_irq_sync_unlock()
222 				gpedge_add[i], ret);  in rc5t583_irq_sync_unlock()
225 	for (i = 0; i < ARRAY_SIZE(rc5t583->irq_en_reg); i++) {  in rc5t583_irq_sync_unlock()
226 		ret = rc5t583_write(rc5t583->dev, irq_en_add[i],  in rc5t583_irq_sync_unlock()
227 					rc5t583->irq_en_reg[i]);  in rc5t583_irq_sync_unlock()
231 				irq_en_add[i], ret);  in rc5t583_irq_sync_unlock()
258 	int i;  in rc5t583_irq()  local
263 	for (i = 0; i < RC5T583_MAX_INTERRUPT_MASK_REGS; i++)  in rc5t583_irq()
264 		int_sts[i] = 0;  in rc5t583_irq()
274 	for (i = 0; i < RC5T583_MAX_INTERRUPT_MASK_REGS; ++i) {  in rc5t583_irq()
275 		if (!(master_int & main_int_type[i]))  in rc5t583_irq()
278 		ret = rc5t583_read(rc5t583->dev, irq_mon_add[i], &int_sts[i]);  in rc5t583_irq()
282 				irq_mon_add[i], ret);  in rc5t583_irq()
283 			int_sts[i] = 0;  in rc5t583_irq()
287 		if (main_int_type[i] & RTC_INT) {  in rc5t583_irq()
289 			if (int_sts[i] & 0x1)  in rc5t583_irq()
291 			if (int_sts[i] & 0x2)  in rc5t583_irq()
293 			if (int_sts[i] & 0x4)  in rc5t583_irq()
295 			if (int_sts[i] & 0x8)  in rc5t583_irq()
299 		ret = rc5t583_write(rc5t583->dev, irq_clr_add[i],  in rc5t583_irq()
300 				~int_sts[i]);  in rc5t583_irq()
304 				irq_clr_add[i], ret);  in rc5t583_irq()
306 		if (main_int_type[i] & RTC_INT)  in rc5t583_irq()
307 			int_sts[i] = rtc_int_sts;  in rc5t583_irq()
314 	for (i = 0; i < RC5T583_MAX_IRQS; ++i) {  in rc5t583_irq()
315 		const struct rc5t583_irq_data *data = &rc5t583_irqs[i];  in rc5t583_irq()
319 			handle_nested_irq(rc5t583->irq_base + i);  in rc5t583_irq()
337 	int i, ret;  in rc5t583_irq_init()  local
347 	for (i = 0; i < RC5T583_MAX_INTERRUPT_EN_REGS; i++)  {  in rc5t583_irq_init()
348 		ret = rc5t583_write(rc5t583->dev, irq_en_add[i],  in rc5t583_irq_init()
349 				rc5t583->irq_en_reg[i]);  in rc5t583_irq_init()
353 				irq_en_add[i], ret);  in rc5t583_irq_init()
356 	for (i = 0; i < RC5T583_MAX_GPEDGE_REG; i++)  {  in rc5t583_irq_init()
357 		ret = rc5t583_write(rc5t583->dev, gpedge_add[i],  in rc5t583_irq_init()
358 				rc5t583->gpedge_reg[i]);  in rc5t583_irq_init()
362 				gpedge_add[i], ret);  in rc5t583_irq_init()
372 	for (i = 0; i < RC5T583_MAX_INTERRUPT_MASK_REGS; i++)  {  in rc5t583_irq_init()
373 		ret = rc5t583_write(rc5t583->dev, irq_clr_add[i], 0);  in rc5t583_irq_init()
377 				irq_clr_add[i], ret);  in rc5t583_irq_init()
383 	for (i = 0; i < RC5T583_MAX_IRQS; i++) {  in rc5t583_irq_init()
384 		int __irq = i + rc5t583->irq_base;  in rc5t583_irq_init()