Lines Matching refs:bit
127 u32 base, int bit) in asic3_irq_flip_edge() argument
135 edge ^= bit; in asic3_irq_flip_edge()
182 int bit = (1 << i); in asic3_irq_demux() local
185 if (!(istat & bit)) in asic3_irq_demux()
192 if (asic->irq_bothedge[bank] & bit) in asic3_irq_demux()
194 bit); in asic3_irq_demux()
303 u16 trigger, level, edge, bit; in asic3_gpio_irq_type() local
308 bit = 1<<index; in asic3_gpio_irq_type()
317 asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] &= ~bit; in asic3_gpio_irq_type()
320 trigger |= bit; in asic3_gpio_irq_type()
321 edge |= bit; in asic3_gpio_irq_type()
323 trigger |= bit; in asic3_gpio_irq_type()
324 edge &= ~bit; in asic3_gpio_irq_type()
326 trigger |= bit; in asic3_gpio_irq_type()
328 edge &= ~bit; in asic3_gpio_irq_type()
330 edge |= bit; in asic3_gpio_irq_type()
331 asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] |= bit; in asic3_gpio_irq_type()
333 trigger &= ~bit; in asic3_gpio_irq_type()
334 level &= ~bit; in asic3_gpio_irq_type()
336 trigger &= ~bit; in asic3_gpio_irq_type()
337 level |= bit; in asic3_gpio_irq_type()
360 u16 bit; in asic3_gpio_irq_set_wake() local
364 bit = 1<<index; in asic3_gpio_irq_set_wake()
366 asic3_set_register(asic, bank + ASIC3_GPIO_SLEEP_MASK, bit, !on); in asic3_gpio_irq_set_wake()