Lines Matching refs:vsyn
61 struct hdmi_pulse vsyn[2]; member
207 (t->vsyn[0].beg << 12) | t->vsyn[0].end); in hdmi_timing_apply()
217 (t->vsyn[1].beg << 12) | t->vsyn[1].end); in hdmi_timing_apply()
230 hdmi_writebn(hdev, HDMI_TG_VSYNC_L, 2, t->vsyn[0].beg); in hdmi_timing_apply()
234 hdmi_writebn(hdev, HDMI_TG_VSYNC_TOP_HDMI_L, 2, t->vsyn[0].beg); in hdmi_timing_apply()
235 hdmi_writebn(hdev, HDMI_TG_FIELD_TOP_HDMI_L, 2, t->vsyn[0].beg); in hdmi_timing_apply()
239 hdmi_writebn(hdev, HDMI_TG_VSYNC2_L, 2, t->vsyn[1].beg); in hdmi_timing_apply()
242 hdmi_writebn(hdev, HDMI_TG_VSYNC_BOT_HDMI_L, 2, t->vsyn[1].beg); in hdmi_timing_apply()
243 hdmi_writebn(hdev, HDMI_TG_FIELD_BOT_HDMI_L, 2, t->vsyn[1].beg); in hdmi_timing_apply()
387 .vsyn[0] = { .beg = 6 + 3, .end = 12 + 3},
397 .vsyn[0] = { .beg = 0 + 5, .end = 5 + 5},
407 .vsyn[0] = { .beg = 0 + 5, .end = 5 + 5},
417 .vsyn[0] = { .beg = 0 + 5, .end = 5 + 5},
427 .vsyn[0] = { .beg = 0 + 4, .end = 5 + 4},
437 .vsyn[0] = { .beg = 0 + 4, .end = 5 + 4},
449 .vsyn[0] = { .beg = 0 + 2, .end = 5 + 2},
450 .vsyn[1] = { .beg = 562 + 2, .end = 567 + 2},
462 .vsyn[0] = { .beg = 0 + 2, .end = 5 + 2},
463 .vsyn[1] = { .beg = 562 + 2, .end = 567 + 2},
473 .vsyn[0] = { .beg = 0 + 4, .end = 5 + 4},