621 	struct saa7164_port *porta = &dev->ports[SAA7164_PORT_TS1];  in saa7164_irq()
622 	struct saa7164_port *portb = &dev->ports[SAA7164_PORT_TS2];  in saa7164_irq()
623 	struct saa7164_port *portc = &dev->ports[SAA7164_PORT_ENC1];  in saa7164_irq()
624 	struct saa7164_port *portd = &dev->ports[SAA7164_PORT_ENC2];  in saa7164_irq()
625 	struct saa7164_port *porte = &dev->ports[SAA7164_PORT_VBI1];  in saa7164_irq()
626 	struct saa7164_port *portf = &dev->ports[SAA7164_PORT_VBI2];  in saa7164_irq()
914 	port = &dev->ports[portnr];  in saa7164_port_init()
1309 			if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {  in saa7164_initdev()
1317 			if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {  in saa7164_initdev()
1325 			if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {  in saa7164_initdev()
1332 			if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {  in saa7164_initdev()
1339 			if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {  in saa7164_initdev()
1346 			if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {  in saa7164_initdev()
1400 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],  in saa7164_finidev()
1401 		&dev->ports[SAA7164_PORT_ENC1].irq_interval);  in saa7164_finidev()
1402 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],  in saa7164_finidev()
1403 		&dev->ports[SAA7164_PORT_ENC1].svc_interval);  in saa7164_finidev()
1404 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],  in saa7164_finidev()
1405 		&dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);  in saa7164_finidev()
1406 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],  in saa7164_finidev()
1407 		&dev->ports[SAA7164_PORT_ENC1].read_interval);  in saa7164_finidev()
1408 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],  in saa7164_finidev()
1409 		&dev->ports[SAA7164_PORT_ENC1].poll_interval);  in saa7164_finidev()
1410 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],  in saa7164_finidev()
1411 		&dev->ports[SAA7164_PORT_VBI1].read_interval);  in saa7164_finidev()
1412 	saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],  in saa7164_finidev()
1413 		&dev->ports[SAA7164_PORT_VBI2].poll_interval);  in saa7164_finidev()
1418 		saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);  in saa7164_finidev()
1421 		saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);  in saa7164_finidev()
1424 		saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);  in saa7164_finidev()
1427 		saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);  in saa7164_finidev()
1430 		saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);  in saa7164_finidev()
1433 		saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);  in saa7164_finidev()