Lines Matching refs:FIFO_RXTX
90 #define FIFO_RXTX 0x0000FFFF macro
327 do_div(count, (FIFO_RXTX << 2) | 0x3); in pulse_clocks_to_clock_divider()
468 return (u32) pulse_width_count_to_ns(FIFO_RXTX, *divider); in txclk_tx_s_max_pulse_width()
481 return (u32) pulse_width_count_to_ns(FIFO_RXTX, *divider); in rxclk_rx_s_max_pulse_width()
695 (u16) (p->hw_fifo_data & FIFO_RXTX), divider); in cx23888_ir_rx_read()
788 (u32) pulse_width_count_to_ns(FIFO_RXTX, rxclk_divider); in cx23888_ir_rx_s_parameters()
910 (u32) pulse_width_count_to_ns(FIFO_RXTX, txclk_divider); in cx23888_ir_tx_s_parameters()
1024 pulse_width_count_to_us(FIFO_RXTX, rxclk), in cx23888_ir_log_status()
1025 pulse_width_count_to_ns(FIFO_RXTX, rxclk)); in cx23888_ir_log_status()
1069 pulse_width_count_to_us(FIFO_RXTX, txclk), in cx23888_ir_log_status()
1070 pulse_width_count_to_ns(FIFO_RXTX, txclk)); in cx23888_ir_log_status()