440 				      unsigned int bpl, u32 risc)  in cx23885_sram_channel_setup()  argument
458 	bpl   = (bpl + 7) & ~7; /* alignment */  in cx23885_sram_channel_setup()
460 	lines = ch->fifo_size / bpl;  in cx23885_sram_channel_setup()
472 			ch->fifo_start + bpl*i);  in cx23885_sram_channel_setup()
473 		cx_write(cdt + 16*i, ch->fifo_start + bpl*i);  in cx23885_sram_channel_setup()
499 	cx_write(ch->cnt1_reg, (bpl >> 3) - 1);  in cx23885_sram_channel_setup()
504 		bpl,  in cx23885_sram_channel_setup()
1060 			       unsigned int bpl, unsigned int padding,  in cx23885_risc_field()  argument
1090 		if (bpl <= sg_dma_len(sg)-offset) {  in cx23885_risc_field()
1092 			*(rp++) = cpu_to_le32(RISC_WRITE|sol|RISC_EOL|bpl);  in cx23885_risc_field()
1095 			offset += bpl;  in cx23885_risc_field()
1098 			todo = bpl;  in cx23885_risc_field()
1127 			unsigned int bottom_offset, unsigned int bpl,  in cx23885_risc_buffer()  argument
1144 	instructions  = fields * (1 + ((bpl + padding) * lines)  in cx23885_risc_buffer()
1156 					bpl, padding, lines, 0, true);  in cx23885_risc_buffer()
1159 					bpl, padding, lines, 0, UNSET == top_offset);  in cx23885_risc_buffer()
1170 				   unsigned int bpl,  in cx23885_risc_databuffer()  argument
1181 	instructions  = 1 + (bpl * lines) / PAGE_SIZE + lines;  in cx23885_risc_databuffer()
1192 				bpl, 0, lines, lpi, lpi == 0);  in cx23885_risc_databuffer()
1202 			unsigned int bottom_offset, unsigned int bpl,  in cx23885_risc_vbibuffer()  argument
1219 	instructions  = fields * (1 + ((bpl + padding) * lines)  in cx23885_risc_vbibuffer()
1233 					bpl, padding, lines, 0, true);  in cx23885_risc_vbibuffer()
1237 					bpl, padding, lines, 0, UNSET == top_offset);  in cx23885_risc_vbibuffer()