3167 	gpio_bits(LM1882_SYNC_DRIVE,LM1882_SYNC_DRIVE);  in init_ids_eagle()
3178 	gpio_bits(3, input & 3);  in eagle_muxsel()
3188 	gpio_bits(LM1882_SYNC_DRIVE,LM1882_SYNC_DRIVE);  in eagle_muxsel()
3222 	gpio_bits( 0xf, inmux );  in sigmaSQ_muxsel()
3229 	gpio_bits( 3<<9, inmux<<9 );  in sigmaSLC_muxsel()
3236 	gpio_bits(0xf, inmux);  in geovision_muxsel()
3251 	gpio_bits((1<<18) | 0xff, value);  in td3116_latch_value()
3252 	gpio_bits((1<<18) | 0xff, (1<<18) | value);  in td3116_latch_value()
3254 	gpio_bits((1<<18) | 0xff, value);  in td3116_latch_value()
3759 	gpio_bits((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren), val);  in bttv_tea575x_set_pins()
3762 		gpio_bits(btv->mbox_iow | btv->mbox_csel, 0);  in bttv_tea575x_set_pins()
3765 		gpio_bits(btv->mbox_ior | btv->mbox_iow | btv->mbox_csel,  in bttv_tea575x_set_pins()
3779 		gpio_bits(btv->mbox_ior | btv->mbox_csel, 0);  in bttv_tea575x_get_pins()
3785 		gpio_bits(btv->mbox_ior | btv->mbox_iow | btv->mbox_csel,  in bttv_tea575x_get_pins()
3888 			gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3890 				gpio_bits(BTTV_ALT_DATA,BTTV_ALT_DATA);  in pvr_altera_load()
3892 				gpio_bits(BTTV_ALT_DATA,0);  in pvr_altera_load()
3893 			gpio_bits(BTTV_ALT_DCLK,BTTV_ALT_DCLK);  in pvr_altera_load()
3897 	gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3902 		gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3903 		gpio_bits(BTTV_ALT_DCLK,BTTV_ALT_DCLK);  in pvr_altera_load()
3905 	gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
4110 	gpio_bits(bttv_tvcards[btv->c.type].gpiomask, gpiobits);  in bttv_tda9880_setnorm()
4127 	gpio_bits(mask,0);  in boot_msp34xx()
4130 	gpio_bits(mask,mask);  in boot_msp34xx()
4160 	gpio_bits(0xffffff, 0);  in init_PXC200()
4402 	gpio_bits(0x07f, muxgpio[input]);  in rv605_muxsel()
4405 	gpio_bits(0x200,0x200);  in rv605_muxsel()
4407 	gpio_bits(0x200,0x000);  in rv605_muxsel()
4411 	gpio_bits(0x480,0x480);  in rv605_muxsel()
4413 	gpio_bits(0x480,0x080);  in rv605_muxsel()
4448 	gpio_bits(0x0f0000, input << 16);  in tibetCS16_muxsel()
4492 	gpio_bits(0x1ff, udata);		/* write ADDR and DAT */  in kodicom4400r_write()
4493 	gpio_bits(0x1ff, udata | (1 << 8));	/* strobe high */  in kodicom4400r_write()
4494 	gpio_bits(0x1ff, udata);		/* strobe low */  in kodicom4400r_write()
4757 	gpio_bits(0x3, mux);  in phytec_muxsel()
4793 	gpio_bits(0x1007f, ADDRESS | CSELECT);	/* write ADDRESS and CSELECT */  in gv800s_write()
4794 	gpio_bits(0x20000, STROBE);		/* STROBE high */  in gv800s_write()
4795 	gpio_bits(0x40000, DATA);		/* write DATA */  in gv800s_write()
4796 	gpio_bits(0x20000, ~STROBE);		/* STROBE low */  in gv800s_write()