Lines Matching refs:timings
151 struct v4l2_dv_timings timings; member
248 struct v4l2_dv_timings timings; member
858 const struct v4l2_dv_timings *timings) in find_and_set_predefined_video_timings() argument
862 for (i = 0; predef_vid_timings[i].timings.bt.width; i++) { in find_and_set_predefined_video_timings()
863 if (!v4l2_match_dv_timings(timings, &predef_vid_timings[i].timings, in find_and_set_predefined_video_timings()
876 struct v4l2_dv_timings *timings) in configure_predefined_video_timings() argument
903 0x01, adv7604_prim_mode_comp, timings); in configure_predefined_video_timings()
906 0x02, adv7604_prim_mode_gr, timings); in configure_predefined_video_timings()
909 0x05, adv76xx_prim_mode_hdmi_comp, timings); in configure_predefined_video_timings()
912 0x06, adv76xx_prim_mode_hdmi_gr, timings); in configure_predefined_video_timings()
1078 if (state->timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) { in set_rgb_quantization_range()
1282 struct v4l2_dv_timings *timings) in stdi2dv_timings() argument
1299 *timings = adv76xx_timings[i]; in stdi2dv_timings()
1307 timings)) in stdi2dv_timings()
1312 state->aspect_ratio, timings)) in stdi2dv_timings()
1380 struct v4l2_enum_dv_timings *timings) in adv76xx_enum_dv_timings() argument
1384 if (timings->index >= ARRAY_SIZE(adv76xx_timings) - 1) in adv76xx_enum_dv_timings()
1387 if (timings->pad >= state->source_pad) in adv76xx_enum_dv_timings()
1390 memset(timings->reserved, 0, sizeof(timings->reserved)); in adv76xx_enum_dv_timings()
1391 timings->timings = adv76xx_timings[timings->index]; in adv76xx_enum_dv_timings()
1432 struct v4l2_dv_timings *timings) in adv76xx_fill_optional_dv_timings_fields() argument
1437 if (v4l2_match_dv_timings(timings, &adv76xx_timings[i], in adv76xx_fill_optional_dv_timings_fields()
1439 *timings = adv76xx_timings[i]; in adv76xx_fill_optional_dv_timings_fields()
1478 struct v4l2_dv_timings *timings) in adv76xx_query_dv_timings() argument
1482 struct v4l2_bt_timings *bt = &timings->bt; in adv76xx_query_dv_timings()
1485 if (!timings) in adv76xx_query_dv_timings()
1488 memset(timings, 0, sizeof(struct v4l2_dv_timings)); in adv76xx_query_dv_timings()
1505 timings->type = V4L2_DV_BT_656_1120; in adv76xx_query_dv_timings()
1525 adv76xx_fill_optional_dv_timings_fields(sd, timings); in adv76xx_query_dv_timings()
1531 if (!stdi2dv_timings(sd, &stdi, timings)) in adv76xx_query_dv_timings()
1535 if (!stdi2dv_timings(sd, &stdi, timings)) in adv76xx_query_dv_timings()
1539 if (stdi2dv_timings(sd, &stdi, timings)) { in adv76xx_query_dv_timings()
1570 memset(timings, 0, sizeof(struct v4l2_dv_timings)); in adv76xx_query_dv_timings()
1583 timings, true); in adv76xx_query_dv_timings()
1589 struct v4l2_dv_timings *timings) in adv76xx_s_dv_timings() argument
1595 if (!timings) in adv76xx_s_dv_timings()
1598 if (v4l2_match_dv_timings(&state->timings, timings, 0)) { in adv76xx_s_dv_timings()
1603 bt = &timings->bt; in adv76xx_s_dv_timings()
1612 adv76xx_fill_optional_dv_timings_fields(sd, timings); in adv76xx_s_dv_timings()
1614 state->timings = *timings; in adv76xx_s_dv_timings()
1619 err = configure_predefined_video_timings(sd, timings); in adv76xx_s_dv_timings()
1630 timings, true); in adv76xx_s_dv_timings()
1635 struct v4l2_dv_timings *timings) in adv76xx_g_dv_timings() argument
1639 *timings = state->timings; in adv76xx_g_dv_timings()
1755 format->width = state->timings.bt.width; in adv76xx_fill_format()
1756 format->height = state->timings.bt.height; in adv76xx_fill_format()
1760 if (state->timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) in adv76xx_fill_format()
1761 format->colorspace = (state->timings.bt.height <= 576) ? in adv76xx_fill_format()
2150 struct v4l2_dv_timings timings; in adv76xx_log_status() local
2221 if (adv76xx_query_dv_timings(sd, &timings)) in adv76xx_log_status()
2225 &timings, true); in adv76xx_log_status()
2227 &state->timings, true); in adv76xx_log_status()
2739 state->timings = cea640x480; in adv76xx_probe()