95 static int ves1x93_writereg (struct ves1x93_state* state, u8 reg, u8 data)  in ves1x93_writereg()  argument
98 	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 3 };  in ves1x93_writereg()
101 	if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {  in ves1x93_writereg()
109 static u8 ves1x93_readreg (struct ves1x93_state* state, u8 reg)  in ves1x93_readreg()  argument
114 …struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 …  in ves1x93_readreg()
115 			   { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };  in ves1x93_readreg()
117 	ret = i2c_transfer (state->i2c, msg, 2);  in ves1x93_readreg()
124 static int ves1x93_clr_bit (struct ves1x93_state* state)  in ves1x93_clr_bit()  argument
127 	ves1x93_writereg (state, 0, state->init_1x93_tab[0] & 0xfe);  in ves1x93_clr_bit()
128 	ves1x93_writereg (state, 0, state->init_1x93_tab[0]);  in ves1x93_clr_bit()
133 static int ves1x93_set_inversion (struct ves1x93_state* state, fe_spectral_inversion_t inversion)  in ves1x93_set_inversion()  argument
156 	return ves1x93_writereg (state, 0x0c, (state->init_1x93_tab[0x0c] & 0x3f) | val);  in ves1x93_set_inversion()
159 static int ves1x93_set_fec (struct ves1x93_state* state, fe_code_rate_t fec)  in ves1x93_set_fec()  argument
162 		return ves1x93_writereg (state, 0x0d, 0x08);  in ves1x93_set_fec()
166 		return ves1x93_writereg (state, 0x0d, fec - FEC_1_2);  in ves1x93_set_fec()
169 static fe_code_rate_t ves1x93_get_fec (struct ves1x93_state* state)  in ves1x93_get_fec()  argument
171 	return FEC_1_2 + ((ves1x93_readreg (state, 0x0d) >> 4) & 0x7);  in ves1x93_get_fec()
174 static int ves1x93_set_symbolrate (struct ves1x93_state* state, u32 srate)  in ves1x93_set_symbolrate()  argument
185 	if (srate > state->config->xin/2)  in ves1x93_set_symbolrate()
186 		srate = state->config->xin/2;  in ves1x93_set_symbolrate()
193 	FIN = (state->config->xin + 6000) >> 4;  in ves1x93_set_symbolrate()
238 	ves1x93_writereg (state, 0x06, 0xff & BDR);  in ves1x93_set_symbolrate()
239 	ves1x93_writereg (state, 0x07, 0xff & (BDR >> 8));  in ves1x93_set_symbolrate()
240 	ves1x93_writereg (state, 0x08, 0x0f & (BDR >> 16));  in ves1x93_set_symbolrate()
242 	ves1x93_writereg (state, 0x09, BDRI);  in ves1x93_set_symbolrate()
243 	ves1x93_writereg (state, 0x20, ADCONF);  in ves1x93_set_symbolrate()
244 	ves1x93_writereg (state, 0x21, FCONF);  in ves1x93_set_symbolrate()
246 	AGCR = state->init_1x93_tab[0x05];  in ves1x93_set_symbolrate()
247 	if (state->config->invert_pwm)  in ves1x93_set_symbolrate()
255 	ves1x93_writereg (state, 0x05, AGCR);  in ves1x93_set_symbolrate()
258 	if (state->demod_type != DEMOD_VES1993)  in ves1x93_set_symbolrate()
259 		ves1x93_clr_bit (state);  in ves1x93_set_symbolrate()
266 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_init()  local
272 	for (i = 0; i < state->tab_size; i++) {  in ves1x93_init()
273 		if (state->init_1x93_wtab[i]) {  in ves1x93_init()
274 			val = state->init_1x93_tab[i];  in ves1x93_init()
276 			if (state->config->invert_pwm && (i == 0x05)) val |= 0x20; /* invert PWM */  in ves1x93_init()
277 			ves1x93_writereg (state, i, val);  in ves1x93_init()
286 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_set_voltage()  local
290 		return ves1x93_writereg (state, 0x1f, 0x20);  in ves1x93_set_voltage()
292 		return ves1x93_writereg (state, 0x1f, 0x30);  in ves1x93_set_voltage()
294 		return ves1x93_writereg (state, 0x1f, 0x00);  in ves1x93_set_voltage()
302 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_read_status()  local
304 	u8 sync = ves1x93_readreg (state, 0x0e);  in ves1x93_read_status()
318 		sync = ves1x93_readreg (state, 0x0e);  in ves1x93_read_status()
343 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_read_ber()  local
345 	*ber = ves1x93_readreg (state, 0x15);  in ves1x93_read_ber()
346 	*ber |= (ves1x93_readreg (state, 0x16) << 8);  in ves1x93_read_ber()
347 	*ber |= ((ves1x93_readreg (state, 0x17) & 0x0F) << 16);  in ves1x93_read_ber()
355 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_read_signal_strength()  local
357 	u8 signal = ~ves1x93_readreg (state, 0x0b);  in ves1x93_read_signal_strength()
365 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_read_snr()  local
367 	u8 _snr = ~ves1x93_readreg (state, 0x1c);  in ves1x93_read_snr()
375 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_read_ucblocks()  local
377 	*ucblocks = ves1x93_readreg (state, 0x18) & 0x7f;  in ves1x93_read_ucblocks()
382 	ves1x93_writereg (state, 0x18, 0x00);  /* reset the counter */  in ves1x93_read_ucblocks()
383 	ves1x93_writereg (state, 0x18, 0x80);  /* dto. */  in ves1x93_read_ucblocks()
391 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_set_frontend()  local
397 	ves1x93_set_inversion (state, p->inversion);  in ves1x93_set_frontend()
398 	ves1x93_set_fec(state, p->fec_inner);  in ves1x93_set_frontend()
399 	ves1x93_set_symbolrate(state, p->symbol_rate);  in ves1x93_set_frontend()
400 	state->inversion = p->inversion;  in ves1x93_set_frontend()
401 	state->frequency = p->frequency;  in ves1x93_set_frontend()
409 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_get_frontend()  local
412 	afc = ((int)((char)(ves1x93_readreg (state, 0x0a) << 1)))/2;  in ves1x93_get_frontend()
415 	p->frequency = state->frequency - afc;  in ves1x93_get_frontend()
421 	if (state->inversion == INVERSION_AUTO)  in ves1x93_get_frontend()
422 		p->inversion = (ves1x93_readreg (state, 0x0f) & 2) ?  in ves1x93_get_frontend()
424 	p->fec_inner = ves1x93_get_fec(state);  in ves1x93_get_frontend()
432 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_sleep()  local
434 	return ves1x93_writereg (state, 0x00, 0x08);  in ves1x93_sleep()
439 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_release()  local
440 	kfree(state);  in ves1x93_release()
445 	struct ves1x93_state* state = fe->demodulator_priv;  in ves1x93_i2c_gate_ctrl()  local
448 		return ves1x93_writereg(state, 0x00, 0x11);  in ves1x93_i2c_gate_ctrl()
450 		return ves1x93_writereg(state, 0x00, 0x01);  in ves1x93_i2c_gate_ctrl()
459 	struct ves1x93_state* state = NULL;  in ves1x93_attach()  local
463 	state = kzalloc(sizeof(struct ves1x93_state), GFP_KERNEL);  in ves1x93_attach()
464 	if (state == NULL) goto error;  in ves1x93_attach()
467 	state->config = config;  in ves1x93_attach()
468 	state->i2c = i2c;  in ves1x93_attach()
469 	state->inversion = INVERSION_OFF;  in ves1x93_attach()
472 	identity = ves1x93_readreg(state, 0x1e);  in ves1x93_attach()
476 		state->demod_type = DEMOD_VES1893;  in ves1x93_attach()
477 		state->init_1x93_tab = init_1893_tab;  in ves1x93_attach()
478 		state->init_1x93_wtab = init_1893_wtab;  in ves1x93_attach()
479 		state->tab_size = sizeof(init_1893_tab);  in ves1x93_attach()
484 		state->demod_type = DEMOD_VES1893;  in ves1x93_attach()
485 		state->init_1x93_tab = init_1893_tab;  in ves1x93_attach()
486 		state->init_1x93_wtab = init_1893_wtab;  in ves1x93_attach()
487 		state->tab_size = sizeof(init_1893_tab);  in ves1x93_attach()
492 		state->demod_type = DEMOD_VES1993;  in ves1x93_attach()
493 		state->init_1x93_tab = init_1993_tab;  in ves1x93_attach()
494 		state->init_1x93_wtab = init_1993_wtab;  in ves1x93_attach()
495 		state->tab_size = sizeof(init_1993_tab);  in ves1x93_attach()
503 	memcpy(&state->frontend.ops, &ves1x93_ops, sizeof(struct dvb_frontend_ops));  in ves1x93_attach()
504 	state->frontend.demodulator_priv = state;  in ves1x93_attach()
505 	return &state->frontend;  in ves1x93_attach()
508 	kfree(state);  in ves1x93_attach()