Lines Matching refs:state
53 enum stv0367_cab_signal_type state; member
67 enum stv0367_ter_signal_type state; member
770 int stv0367_writeregs(struct stv0367_state *state, u16 reg, u8 *data, int len) in stv0367_writeregs() argument
774 .addr = state->config->demod_address, in stv0367_writeregs()
796 ret = i2c_transfer(state->i2c, &msg, 1); in stv0367_writeregs()
803 static int stv0367_writereg(struct stv0367_state *state, u16 reg, u8 data) in stv0367_writereg() argument
805 return stv0367_writeregs(state, reg, &data, 1); in stv0367_writereg()
808 static u8 stv0367_readreg(struct stv0367_state *state, u16 reg) in stv0367_readreg() argument
814 .addr = state->config->demod_address, in stv0367_readreg()
819 .addr = state->config->demod_address, in stv0367_readreg()
830 ret = i2c_transfer(state->i2c, msg, 2); in stv0367_readreg()
854 static void stv0367_writebits(struct stv0367_state *state, u32 label, u8 val) in stv0367_writebits() argument
858 reg = stv0367_readreg(state, (label >> 16) & 0xffff); in stv0367_writebits()
864 stv0367_writereg(state, (label >> 16) & 0xffff, reg); in stv0367_writebits()
879 static u8 stv0367_readbits(struct stv0367_state *state, u32 label) in stv0367_readbits() argument
886 val = stv0367_readreg(state, label >> 16); in stv0367_readbits()
904 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_gate_ctrl() local
905 u8 tmp = stv0367_readreg(state, R367TER_I2CRPT); in stv0367ter_gate_ctrl()
917 stv0367_writereg(state, R367TER_I2CRPT, tmp); in stv0367ter_gate_ctrl()
1022 static u32 stv0367ter_get_mclk(struct stv0367_state *state, u32 ExtClk_Hz) in stv0367ter_get_mclk() argument
1029 if (stv0367_readbits(state, F367TER_BYPASS_PLLXN) == 0) { in stv0367ter_get_mclk()
1030 n = (u32)stv0367_readbits(state, F367TER_PLL_NDIV); in stv0367ter_get_mclk()
1034 m = (u32)stv0367_readbits(state, F367TER_PLL_MDIV); in stv0367ter_get_mclk()
1038 p = (u32)stv0367_readbits(state, F367TER_PLL_PDIV); in stv0367ter_get_mclk()
1054 static int stv0367ter_filt_coeff_init(struct stv0367_state *state, in stv0367ter_filt_coeff_init() argument
1061 freq = stv0367ter_get_mclk(state, DemodXtal); in stv0367ter_filt_coeff_init()
1073 stv0367_writebits(state, F367TER_IIR_CELL_NB, i - 1); in stv0367ter_filt_coeff_init()
1076 stv0367_writereg(state, in stv0367ter_filt_coeff_init()
1079 stv0367_writereg(state, in stv0367ter_filt_coeff_init()
1089 static void stv0367ter_agc_iir_lock_detect_set(struct stv0367_state *state) in stv0367ter_agc_iir_lock_detect_set() argument
1093 stv0367_writebits(state, F367TER_LOCK_DETECT_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
1096 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x00); in stv0367ter_agc_iir_lock_detect_set()
1097 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06); in stv0367ter_agc_iir_lock_detect_set()
1098 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04); in stv0367ter_agc_iir_lock_detect_set()
1101 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x01); in stv0367ter_agc_iir_lock_detect_set()
1102 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x06); in stv0367ter_agc_iir_lock_detect_set()
1103 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x04); in stv0367ter_agc_iir_lock_detect_set()
1106 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x02); in stv0367ter_agc_iir_lock_detect_set()
1107 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01); in stv0367ter_agc_iir_lock_detect_set()
1108 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
1111 stv0367_writebits(state, F367TER_LOCK_DETECT_CHOICE, 0x03); in stv0367ter_agc_iir_lock_detect_set()
1112 stv0367_writebits(state, F367TER_LOCK_DETECT_MSB, 0x01); in stv0367ter_agc_iir_lock_detect_set()
1113 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_LSB, 0x00); in stv0367ter_agc_iir_lock_detect_set()
1117 static int stv0367_iir_filt_init(struct stv0367_state *state, u8 Bandwidth, in stv0367_iir_filt_init() argument
1122 stv0367_writebits(state, F367TER_NRST_IIR, 0); in stv0367_iir_filt_init()
1126 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
1132 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
1138 if (!stv0367ter_filt_coeff_init(state, in stv0367_iir_filt_init()
1147 stv0367_writebits(state, F367TER_NRST_IIR, 1); in stv0367_iir_filt_init()
1152 static void stv0367ter_agc_iir_rst(struct stv0367_state *state) in stv0367ter_agc_iir_rst() argument
1159 com_n = stv0367_readbits(state, F367TER_COM_N); in stv0367ter_agc_iir_rst()
1161 stv0367_writebits(state, F367TER_COM_N, 0x07); in stv0367ter_agc_iir_rst()
1163 stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x00); in stv0367ter_agc_iir_rst()
1164 stv0367_writebits(state, F367TER_COM_AGC_ON, 0x00); in stv0367ter_agc_iir_rst()
1166 stv0367_writebits(state, F367TER_COM_SOFT_RSTN, 0x01); in stv0367ter_agc_iir_rst()
1167 stv0367_writebits(state, F367TER_COM_AGC_ON, 0x01); in stv0367ter_agc_iir_rst()
1169 stv0367_writebits(state, F367TER_COM_N, com_n); in stv0367ter_agc_iir_rst()
1196 stv0367_ter_signal_type stv0367ter_check_syr(struct stv0367_state *state) in stv0367ter_check_syr() argument
1204 SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK); in stv0367ter_check_syr()
1209 SYR_var = stv0367_readbits(state, F367TER_SYR_LOCK); in stv0367ter_check_syr()
1224 stv0367_ter_signal_type stv0367ter_check_cpamp(struct stv0367_state *state, in stv0367ter_check_cpamp() argument
1253 CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT); in stv0367ter_check_cpamp()
1257 CPAMPvalue = stv0367_readbits(state, F367TER_PPM_CPAMP_DIRECT); in stv0367ter_check_cpamp()
1273 stv0367ter_lock_algo(struct stv0367_state *state) in stv0367ter_lock_algo() argument
1282 if (state == NULL) in stv0367ter_lock_algo()
1289 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0); in stv0367ter_lock_algo()
1291 if (state->config->if_iq_mode != 0) in stv0367ter_lock_algo()
1292 stv0367_writebits(state, F367TER_COM_N, 0x07); in stv0367ter_lock_algo()
1294 stv0367_writebits(state, F367TER_GUARD, 3);/* suggest 2k 1/4 */ in stv0367ter_lock_algo()
1295 stv0367_writebits(state, F367TER_MODE, 0); in stv0367ter_lock_algo()
1296 stv0367_writebits(state, F367TER_SYR_TR_DIS, 0); in stv0367ter_lock_algo()
1299 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1); in stv0367ter_lock_algo()
1302 if (stv0367ter_check_syr(state) == FE_TER_NOSYMBOL) in stv0367ter_lock_algo()
1307 mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_lock_algo()
1308 if (stv0367ter_check_cpamp(state, mode) == in stv0367ter_lock_algo()
1319 tmp = stv0367_readreg(state, R367TER_SYR_STAT); in stv0367ter_lock_algo()
1320 tmp2 = stv0367_readreg(state, R367TER_STATUS); in stv0367ter_lock_algo()
1321 dprintk("state=%p\n", state); in stv0367ter_lock_algo()
1325 tmp = stv0367_readreg(state, R367TER_PRVIT); in stv0367ter_lock_algo()
1326 tmp2 = stv0367_readreg(state, R367TER_I2CRPT); in stv0367ter_lock_algo()
1329 tmp = stv0367_readreg(state, R367TER_GAIN_SRC1); in stv0367ter_lock_algo()
1344 stv0367_writebits(state, F367TER_AUTO_LE_EN, 0); in stv0367ter_lock_algo()
1345 stv0367_writereg(state, R367TER_CHC_CTL, 0x01); in stv0367ter_lock_algo()
1349 stv0367_writebits(state, F367TER_AUTO_LE_EN, 1); in stv0367ter_lock_algo()
1350 stv0367_writereg(state, R367TER_CHC_CTL, 0x11); in stv0367ter_lock_algo()
1359 stv0367_writebits(state, F367TER_RST_SFEC, 1); in stv0367ter_lock_algo()
1360 stv0367_writebits(state, F367TER_RST_REEDSOLO, 1); in stv0367ter_lock_algo()
1362 stv0367_writebits(state, F367TER_RST_SFEC, 0); in stv0367ter_lock_algo()
1363 stv0367_writebits(state, F367TER_RST_REEDSOLO, 0); in stv0367ter_lock_algo()
1365 u_var1 = stv0367_readbits(state, F367TER_LK); in stv0367ter_lock_algo()
1366 u_var2 = stv0367_readbits(state, F367TER_PRF); in stv0367ter_lock_algo()
1367 u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK); in stv0367ter_lock_algo()
1377 u_var1 = stv0367_readbits(state, F367TER_LK); in stv0367ter_lock_algo()
1378 u_var2 = stv0367_readbits(state, F367TER_PRF); in stv0367ter_lock_algo()
1379 u_var3 = stv0367_readbits(state, F367TER_TPS_LOCK); in stv0367ter_lock_algo()
1393 guard = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_lock_algo()
1394 stv0367_writereg(state, R367TER_CHC_CTL, 0x11); in stv0367ter_lock_algo()
1398 stv0367_writebits(state, F367TER_AUTO_LE_EN, 0); in stv0367ter_lock_algo()
1400 stv0367_writebits(state, F367TER_SYR_FILTER, 0); in stv0367ter_lock_algo()
1404 stv0367_writebits(state, F367TER_AUTO_LE_EN, 1); in stv0367ter_lock_algo()
1406 stv0367_writebits(state, F367TER_SYR_FILTER, 1); in stv0367ter_lock_algo()
1414 if ((stv0367_readbits(state, F367TER_TPS_CONST) == 2) && in stv0367ter_lock_algo()
1416 (stv0367_readbits(state, F367TER_TPS_HPCODE) != 0)) { in stv0367ter_lock_algo()
1417 stv0367_writereg(state, R367TER_SFDLYSETH, 0xc0); in stv0367ter_lock_algo()
1418 stv0367_writereg(state, R367TER_SFDLYSETM, 0x60); in stv0367ter_lock_algo()
1419 stv0367_writereg(state, R367TER_SFDLYSETL, 0x0); in stv0367ter_lock_algo()
1421 stv0367_writereg(state, R367TER_SFDLYSETH, 0x0); in stv0367ter_lock_algo()
1424 u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK); in stv0367ter_lock_algo()
1429 u_var4 = stv0367_readbits(state, F367TER_TSFIFO_LINEOK); in stv0367ter_lock_algo()
1447 stv0367_writebits(state, F367TER_SYR_TR_DIS, 1); in stv0367ter_lock_algo()
1455 static void stv0367ter_set_ts_mode(struct stv0367_state *state, in stv0367ter_set_ts_mode() argument
1461 if (state == NULL) in stv0367ter_set_ts_mode()
1464 stv0367_writebits(state, F367TER_TS_DIS, 0); in stv0367ter_set_ts_mode()
1469 stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 0); in stv0367ter_set_ts_mode()
1470 stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 0); in stv0367ter_set_ts_mode()
1473 stv0367_writebits(state, F367TER_TSFIFO_SERIAL, 1); in stv0367ter_set_ts_mode()
1474 stv0367_writebits(state, F367TER_TSFIFO_DVBCI, 1); in stv0367ter_set_ts_mode()
1479 static void stv0367ter_set_clk_pol(struct stv0367_state *state, in stv0367ter_set_clk_pol() argument
1485 if (state == NULL) in stv0367ter_set_clk_pol()
1490 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 1); in stv0367ter_set_clk_pol()
1493 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0); in stv0367ter_set_clk_pol()
1497 stv0367_writebits(state, F367TER_TS_BYTE_CLK_INV, 0); in stv0367ter_set_clk_pol()
1503 static void stv0367ter_core_sw(struct stv0367_state *state)
1508 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
1509 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
1515 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_standby() local
1520 stv0367_writebits(state, F367TER_STDBY, 1); in stv0367ter_standby()
1521 stv0367_writebits(state, F367TER_STDBY_FEC, 1); in stv0367ter_standby()
1522 stv0367_writebits(state, F367TER_STDBY_CORE, 1); in stv0367ter_standby()
1524 stv0367_writebits(state, F367TER_STDBY, 0); in stv0367ter_standby()
1525 stv0367_writebits(state, F367TER_STDBY_FEC, 0); in stv0367ter_standby()
1526 stv0367_writebits(state, F367TER_STDBY_CORE, 0); in stv0367ter_standby()
1539 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_init() local
1540 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_init()
1548 stv0367_writereg(state, def0367ter[i].addr, in stv0367ter_init()
1551 switch (state->config->xtal) { in stv0367ter_init()
1554 stv0367_writereg(state, R367TER_PLLMDIV, 0xa); in stv0367ter_init()
1555 stv0367_writereg(state, R367TER_PLLNDIV, 0x55); in stv0367ter_init()
1556 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367ter_init()
1561 stv0367_writereg(state, R367TER_PLLMDIV, 0x1); in stv0367ter_init()
1562 stv0367_writereg(state, R367TER_PLLNDIV, 0x8); in stv0367ter_init()
1563 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367ter_init()
1566 stv0367_writereg(state, R367TER_PLLMDIV, 0xc); in stv0367ter_init()
1567 stv0367_writereg(state, R367TER_PLLNDIV, 0x55); in stv0367ter_init()
1568 stv0367_writereg(state, R367TER_PLLSETUP, 0x18); in stv0367ter_init()
1572 stv0367_writereg(state, R367TER_I2CRPT, 0xa0); in stv0367ter_init()
1573 stv0367_writereg(state, R367TER_ANACTRL, 0x00); in stv0367ter_init()
1576 stv0367ter_set_ts_mode(state, state->config->ts_mode); in stv0367ter_init()
1577 stv0367ter_set_clk_pol(state, state->config->clk_pol); in stv0367ter_init()
1579 state->chip_id = stv0367_readreg(state, R367TER_ID); in stv0367ter_init()
1589 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_algo() local
1590 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_algo()
1602 + stv0367_readbits(state, F367TER_FORCE) * 2; in stv0367ter_algo()
1603 ter_state->if_iq_mode = state->config->if_iq_mode; in stv0367ter_algo()
1604 switch (state->config->if_iq_mode) { in stv0367ter_algo()
1607 stv0367_writebits(state, F367TER_TUNER_BB, 0); in stv0367ter_algo()
1608 stv0367_writebits(state, F367TER_LONGPATH_IF, 0); in stv0367ter_algo()
1609 stv0367_writebits(state, F367TER_DEMUX_SWAP, 0); in stv0367ter_algo()
1613 stv0367_writebits(state, F367TER_TUNER_BB, 0); in stv0367ter_algo()
1614 stv0367_writebits(state, F367TER_LONGPATH_IF, 1); in stv0367ter_algo()
1615 stv0367_writebits(state, F367TER_DEMUX_SWAP, 1); in stv0367ter_algo()
1619 stv0367_writebits(state, F367TER_TUNER_BB, 1); in stv0367ter_algo()
1620 stv0367_writebits(state, F367TER_PPM_INVSEL, 0); in stv0367ter_algo()
1634 stv0367_writebits(state, F367TER_IQ_INVERT, in stv0367ter_algo()
1637 stv0367_writebits(state, F367TER_INV_SPECTR, in stv0367ter_algo()
1644 stv0367_writebits(state, F367TER_IQ_INVERT, in stv0367ter_algo()
1647 stv0367_writebits(state, F367TER_INV_SPECTR, in stv0367ter_algo()
1655 stv0367ter_agc_iir_lock_detect_set(state); in stv0367ter_algo()
1659 stv0367_writebits(state, F367TER_SEL_IQNTAR, 1); in stv0367ter_algo()
1660 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB); in stv0367ter_algo()
1664 stv0367_writebits(state, F367TER_SEL_IQNTAR, 0); in stv0367ter_algo()
1665 stv0367_writebits(state, F367TER_AUT_AGC_TARGET_MSB, 0xB); in stv0367ter_algo()
1668 if (!stv0367_iir_filt_init(state, ter_state->bw, in stv0367ter_algo()
1669 state->config->xtal)) in stv0367ter_algo()
1674 stv0367ter_agc_iir_rst(state); in stv0367ter_algo()
1678 stv0367_writebits(state, F367TER_BDI_LPSEL, 0x01); in stv0367ter_algo()
1680 stv0367_writebits(state, F367TER_BDI_LPSEL, 0x00); in stv0367ter_algo()
1682 InternalFreq = stv0367ter_get_mclk(state, state->config->xtal) / 1000; in stv0367ter_algo()
1687 stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, temp % 2); in stv0367ter_algo()
1689 stv0367_writebits(state, F367TER_TRL_NOMRATE_HI, temp / 256); in stv0367ter_algo()
1690 stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, temp % 256); in stv0367ter_algo()
1692 temp = stv0367_readbits(state, F367TER_TRL_NOMRATE_HI) * 512 + in stv0367ter_algo()
1693 stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 + in stv0367ter_algo()
1694 stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB); in stv0367ter_algo()
1696 stv0367_writebits(state, F367TER_GAIN_SRC_HI, temp / 256); in stv0367ter_algo()
1697 stv0367_writebits(state, F367TER_GAIN_SRC_LO, temp % 256); in stv0367ter_algo()
1698 temp = stv0367_readbits(state, F367TER_GAIN_SRC_HI) * 256 + in stv0367ter_algo()
1699 stv0367_readbits(state, F367TER_GAIN_SRC_LO); in stv0367ter_algo()
1702 ((InternalFreq - state->config->if_khz) * (1 << 16) in stv0367ter_algo()
1706 stv0367_writebits(state, F367TER_INC_DEROT_HI, temp / 256); in stv0367ter_algo()
1707 stv0367_writebits(state, F367TER_INC_DEROT_LO, temp % 256); in stv0367ter_algo()
1712 stv0367_writebits(state, F367TER_LONG_ECHO, ter_state->echo_pos); in stv0367ter_algo()
1714 if (stv0367ter_lock_algo(state) != FE_TER_LOCKOK) in stv0367ter_algo()
1717 ter_state->state = FE_TER_LOCKOK; in stv0367ter_algo()
1719 ter_state->mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_algo()
1720 ter_state->guard = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_algo()
1725 (stv0367_readbits(state, F367TER_AGC1_VAL_LO) << 16) + in stv0367ter_algo()
1726 (stv0367_readbits(state, F367TER_AGC1_VAL_HI) << 24) + in stv0367ter_algo()
1727 stv0367_readbits(state, F367TER_AGC2_VAL_LO) + in stv0367ter_algo()
1728 (stv0367_readbits(state, F367TER_AGC2_VAL_HI) << 8); in stv0367ter_algo()
1731 stv0367_writebits(state, F367TER_FREEZE, 1); in stv0367ter_algo()
1732 offset = (stv0367_readbits(state, F367TER_CRL_FOFFSET_VHI) << 16) ; in stv0367ter_algo()
1733 offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_HI) << 8); in stv0367ter_algo()
1734 offset += (stv0367_readbits(state, F367TER_CRL_FOFFSET_LO)); in stv0367ter_algo()
1735 stv0367_writebits(state, F367TER_FREEZE, 0); in stv0367ter_algo()
1748 if (stv0367_readbits(state, F367TER_PPM_INVSEL) == 1) { in stv0367ter_algo()
1749 if ((stv0367_readbits(state, F367TER_INV_SPECTR) == in stv0367ter_algo()
1750 (stv0367_readbits(state, in stv0367ter_algo()
1766 timing_offset = stv0367_readbits(state, F367TER_TRL_TOFFSET_LO) in stv0367ter_algo()
1767 + 256 * stv0367_readbits(state, in stv0367ter_algo()
1771 trl_nomrate = (512 * stv0367_readbits(state, in stv0367ter_algo()
1773 + stv0367_readbits(state, F367TER_TRL_NOMRATE_LO) * 2 in stv0367ter_algo()
1774 + stv0367_readbits(state, F367TER_TRL_NOMRATE_LSB)); in stv0367ter_algo()
1791 stv0367_writebits(state, F367TER_TRL_NOMRATE_LSB, in stv0367ter_algo()
1793 stv0367_writebits(state, F367TER_TRL_NOMRATE_LO, in stv0367ter_algo()
1801 u_var = stv0367_readbits(state, F367TER_LK); in stv0367ter_algo()
1804 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0); in stv0367ter_algo()
1806 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1); in stv0367ter_algo()
1815 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_set_frontend() local
1816 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_set_frontend()
1885 ter_state->state = FE_TER_NOLOCK; in stv0367ter_set_frontend()
1888 while (((index) < num_trials) && (ter_state->state != FE_TER_LOCKOK)) { in stv0367ter_set_frontend()
1896 if ((ter_state->state == FE_TER_LOCKOK) && in stv0367ter_set_frontend()
1912 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_ucblocks() local
1913 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_read_ucblocks()
1917 if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) { in stv0367ter_read_ucblocks()
1919 ((u32)stv0367_readbits(state, F367TER_ERR_CNT1) in stv0367ter_read_ucblocks()
1921 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI) in stv0367ter_read_ucblocks()
1923 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO)); in stv0367ter_read_ucblocks()
1935 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_get_frontend() local
1936 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_get_frontend()
1944 constell = stv0367_readbits(state, F367TER_TPS_CONST); in stv0367ter_get_frontend()
1952 p->inversion = stv0367_readbits(state, F367TER_INV_SPECTR); in stv0367ter_get_frontend()
1955 Data = stv0367_readbits(state, F367TER_TPS_HIERMODE); in stv0367ter_get_frontend()
1977 Data = stv0367_readbits(state, F367TER_TPS_LPCODE); in stv0367ter_get_frontend()
1979 Data = stv0367_readbits(state, F367TER_TPS_HPCODE); in stv0367ter_get_frontend()
2002 mode = stv0367_readbits(state, F367TER_SYR_MODE); in stv0367ter_get_frontend()
2018 p->guard_interval = stv0367_readbits(state, F367TER_SYR_GUARD); in stv0367ter_get_frontend()
2025 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_snr() local
2028 u8 cut = stv0367_readbits(state, F367TER_IDENTIFICATIONREG); in stv0367ter_read_snr()
2033 snru32 += stv0367_readbits(state, F367TER_CHCSNR) / 4; in stv0367ter_read_snr()
2035 snru32 += 125 * stv0367_readbits(state, F367TER_CHCSNR); in stv0367ter_read_snr()
2051 struct stv0367_state *state = fe->demodulator_priv;
2052 struct stv0367ter_state *ter_state = state->ter_state;
2055 locked = (stv0367_readbits(state, F367TER_LK));
2062 if (!stv0367_readbits(state, F367TER_TPS_LOCK) ||
2063 (!stv0367_readbits(state, F367TER_LK))) {
2064 stv0367_writebits(state, F367TER_CORE_ACTIVE, 0);
2066 stv0367_writebits(state, F367TER_CORE_ACTIVE, 1);
2068 locked = (stv0367_readbits(state, F367TER_TPS_LOCK)) &&
2069 (stv0367_readbits(state, F367TER_LK));
2079 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_status() local
2085 if (stv0367_readbits(state, F367TER_LK)) { in stv0367ter_read_status()
2095 struct stv0367_state *state = fe->demodulator_priv; in stv0367ter_read_ber() local
2096 struct stv0367ter_state *ter_state = state->ter_state; in stv0367ter_read_ber()
2102 if (stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 0) in stv0367ter_read_ber()
2103 Errors = ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT) in stv0367ter_read_ber()
2105 + ((u32)stv0367_readbits(state, F367TER_SFEC_ERR_CNT_HI) in stv0367ter_read_ber()
2107 + ((u32)stv0367_readbits(state, in stv0367ter_read_ber()
2115 abc = stv0367_readbits(state, F367TER_SFEC_ERR_SOURCE); in stv0367ter_read_ber()
2116 def = stv0367_readbits(state, F367TER_SFEC_NUM_EVENT); in stv0367ter_read_ber()
2177 static u32 stv0367ter_get_per(struct stv0367_state *state)
2179 struct stv0367ter_state *ter_state = state->ter_state;
2183 while (((stv0367_readbits(state, F367TER_SFERRC_OLDVALUE) == 1) &&
2186 Errors = ((u32)stv0367_readbits(state, F367TER_ERR_CNT1)
2188 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_HI)
2190 + ((u32)stv0367_readbits(state, F367TER_ERR_CNT1_LO));
2193 abc = stv0367_readbits(state, F367TER_ERR_SRC1);
2194 def = stv0367_readbits(state, F367TER_NUM_EVT1);
2258 struct stv0367_state *state = fe->demodulator_priv; in stv0367_release() local
2260 kfree(state->ter_state); in stv0367_release()
2261 kfree(state->cab_state); in stv0367_release()
2262 kfree(state); in stv0367_release()
2299 struct stv0367_state *state = NULL; in stv0367ter_attach() local
2303 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367ter_attach()
2304 if (state == NULL) in stv0367ter_attach()
2311 state->i2c = i2c; in stv0367ter_attach()
2312 state->config = config; in stv0367ter_attach()
2313 state->ter_state = ter_state; in stv0367ter_attach()
2314 state->fe.ops = stv0367ter_ops; in stv0367ter_attach()
2315 state->fe.demodulator_priv = state; in stv0367ter_attach()
2316 state->chip_id = stv0367_readreg(state, 0xf000); in stv0367ter_attach()
2318 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367ter_attach()
2321 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367ter_attach()
2324 return &state->fe; in stv0367ter_attach()
2328 kfree(state); in stv0367ter_attach()
2335 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_gate_ctrl() local
2339 stv0367_writebits(state, F367CAB_I2CT_ON, (enable > 0) ? 1 : 0); in stv0367cab_gate_ctrl()
2346 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_get_mclk() local
2351 if (stv0367_readbits(state, F367CAB_BYPASS_PLLXN) == 0) { in stv0367cab_get_mclk()
2352 N = (u32)stv0367_readbits(state, F367CAB_PLL_NDIV); in stv0367cab_get_mclk()
2356 M = (u32)stv0367_readbits(state, F367CAB_PLL_MDIV); in stv0367cab_get_mclk()
2360 P = (u32)stv0367_readbits(state, F367CAB_PLL_PDIV); in stv0367cab_get_mclk()
2385 static enum stv0367cab_mod stv0367cab_SetQamSize(struct stv0367_state *state, in stv0367cab_SetQamSize() argument
2390 stv0367_writebits(state, F367CAB_QAM_MODE, QAMSize); in stv0367cab_SetQamSize()
2395 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2398 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x64); in stv0367cab_SetQamSize()
2399 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2400 stv0367_writereg(state, R367CAB_FSM_STATE, 0x90); in stv0367cab_SetQamSize()
2401 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2402 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
2403 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95); in stv0367cab_SetQamSize()
2404 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
2405 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x8a); in stv0367cab_SetQamSize()
2408 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2409 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x6e); in stv0367cab_SetQamSize()
2410 stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0); in stv0367cab_SetQamSize()
2411 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2412 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xb7); in stv0367cab_SetQamSize()
2413 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x9d); in stv0367cab_SetQamSize()
2414 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f); in stv0367cab_SetQamSize()
2415 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
2418 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x82); in stv0367cab_SetQamSize()
2419 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a); in stv0367cab_SetQamSize()
2421 stv0367_writereg(state, R367CAB_FSM_STATE, 0xb0); in stv0367cab_SetQamSize()
2422 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2423 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa5); in stv0367cab_SetQamSize()
2425 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
2426 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2427 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6); in stv0367cab_SetQamSize()
2429 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
2430 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1); in stv0367cab_SetQamSize()
2431 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
2433 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x95); in stv0367cab_SetQamSize()
2434 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
2435 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0x99); in stv0367cab_SetQamSize()
2438 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2439 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x76); in stv0367cab_SetQamSize()
2440 stv0367_writereg(state, R367CAB_FSM_STATE, 0x90); in stv0367cab_SetQamSize()
2441 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xb1); in stv0367cab_SetQamSize()
2443 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
2445 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa6); in stv0367cab_SetQamSize()
2447 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0x97); in stv0367cab_SetQamSize()
2449 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x8e); in stv0367cab_SetQamSize()
2450 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x7f); in stv0367cab_SetQamSize()
2451 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
2454 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x94); in stv0367cab_SetQamSize()
2455 stv0367_writereg(state, R367CAB_AGC_PWR_REF_L, 0x5a); in stv0367cab_SetQamSize()
2456 stv0367_writereg(state, R367CAB_FSM_STATE, 0xa0); in stv0367cab_SetQamSize()
2458 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2460 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xc1); in stv0367cab_SetQamSize()
2462 stv0367_writereg(state, R367CAB_EQU_CTR_LPF_GAIN, 0xd1); in stv0367cab_SetQamSize()
2464 stv0367_writereg(state, R367CAB_EQU_CRL_LPF_GAIN, 0xa7); in stv0367cab_SetQamSize()
2465 stv0367_writereg(state, R367CAB_EQU_CRL_LD_SEN, 0x85); in stv0367cab_SetQamSize()
2466 stv0367_writereg(state, R367CAB_EQU_CRL_LIMITER, 0x40); in stv0367cab_SetQamSize()
2467 stv0367_writereg(state, R367CAB_EQU_PNT_GAIN, 0xa7); in stv0367cab_SetQamSize()
2470 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2473 stv0367_writereg(state, R367CAB_IQDEM_ADJ_AGC_REF, 0x00); in stv0367cab_SetQamSize()
2482 static u32 stv0367cab_set_derot_freq(struct stv0367_state *state, in stv0367cab_set_derot_freq() argument
2508 stv0367_writereg(state, R367CAB_MIX_NCO_LL, sampled_if); in stv0367cab_set_derot_freq()
2509 stv0367_writereg(state, R367CAB_MIX_NCO_HL, (sampled_if >> 8)); in stv0367cab_set_derot_freq()
2510 stv0367_writebits(state, F367CAB_MIX_NCO_INC_HH, (sampled_if >> 16)); in stv0367cab_set_derot_freq()
2515 static u32 stv0367cab_get_derot_freq(struct stv0367_state *state, u32 adc_hz) in stv0367cab_get_derot_freq() argument
2519 sampled_if = stv0367_readbits(state, F367CAB_MIX_NCO_INC_LL) + in stv0367cab_get_derot_freq()
2520 (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HL) << 8) + in stv0367cab_get_derot_freq()
2521 (stv0367_readbits(state, F367CAB_MIX_NCO_INC_HH) << 16); in stv0367cab_get_derot_freq()
2531 static u32 stv0367cab_set_srate(struct stv0367_state *state, u32 adc_hz, in stv0367cab_set_srate() argument
2576 stv0367_writereg(state, R367CAB_EQU_CRL_TFR, (u8)u32_tmp); in stv0367cab_set_srate()
2650 if (stv0367_readbits(state, F367CAB_ADJ_EN)) { in stv0367cab_set_srate()
2651 stv0367cab_SetIirAdjacentcoefficient(state, mclk_hz, in stv0367cab_set_srate()
2655 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 1); in stv0367cab_set_srate()
2656 stv0367cab_SetAllPasscoefficient(state, mclk_hz, SymbolRate); in stv0367cab_set_srate()
2661 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); in stv0367cab_set_srate()
2663 stv0367_writereg(state, R367CAB_SRC_NCO_LL, u32_tmp); in stv0367cab_set_srate()
2664 stv0367_writereg(state, R367CAB_SRC_NCO_LH, (u32_tmp >> 8)); in stv0367cab_set_srate()
2665 stv0367_writereg(state, R367CAB_SRC_NCO_HL, (u32_tmp >> 16)); in stv0367cab_set_srate()
2666 stv0367_writereg(state, R367CAB_SRC_NCO_HH, (u32_tmp >> 24)); in stv0367cab_set_srate()
2668 stv0367_writereg(state, R367CAB_IQDEM_GAIN_SRC_L, u32_tmp1 & 0x00ff); in stv0367cab_set_srate()
2669 stv0367_writebits(state, F367CAB_GAIN_SRC_HI, (u32_tmp1 >> 8) & 0x00ff); in stv0367cab_set_srate()
2674 static u32 stv0367cab_GetSymbolRate(struct stv0367_state *state, u32 mclk_hz) in stv0367cab_GetSymbolRate() argument
2679 regsym = stv0367_readreg(state, R367CAB_SRC_NCO_LL) + in stv0367cab_GetSymbolRate()
2680 (stv0367_readreg(state, R367CAB_SRC_NCO_LH) << 8) + in stv0367cab_GetSymbolRate()
2681 (stv0367_readreg(state, R367CAB_SRC_NCO_HL) << 16) + in stv0367cab_GetSymbolRate()
2682 (stv0367_readreg(state, R367CAB_SRC_NCO_HH) << 24); in stv0367cab_GetSymbolRate()
2721 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_status() local
2727 if (stv0367_readbits(state, F367CAB_QAMFEC_LOCK)) { in stv0367cab_read_status()
2737 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_standby() local
2742 stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x03); in stv0367cab_standby()
2743 stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x01); in stv0367cab_standby()
2744 stv0367_writebits(state, F367CAB_STDBY, 1); in stv0367cab_standby()
2745 stv0367_writebits(state, F367CAB_STDBY_CORE, 1); in stv0367cab_standby()
2746 stv0367_writebits(state, F367CAB_EN_BUFFER_I, 0); in stv0367cab_standby()
2747 stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 0); in stv0367cab_standby()
2748 stv0367_writebits(state, F367CAB_POFFQ, 1); in stv0367cab_standby()
2749 stv0367_writebits(state, F367CAB_POFFI, 1); in stv0367cab_standby()
2751 stv0367_writebits(state, F367CAB_STDBY_PLLXN, 0x00); in stv0367cab_standby()
2752 stv0367_writebits(state, F367CAB_BYPASS_PLLXN, 0x00); in stv0367cab_standby()
2753 stv0367_writebits(state, F367CAB_STDBY, 0); in stv0367cab_standby()
2754 stv0367_writebits(state, F367CAB_STDBY_CORE, 0); in stv0367cab_standby()
2755 stv0367_writebits(state, F367CAB_EN_BUFFER_I, 1); in stv0367cab_standby()
2756 stv0367_writebits(state, F367CAB_EN_BUFFER_Q, 1); in stv0367cab_standby()
2757 stv0367_writebits(state, F367CAB_POFFQ, 0); in stv0367cab_standby()
2758 stv0367_writebits(state, F367CAB_POFFI, 0); in stv0367cab_standby()
2771 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_init() local
2772 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_init()
2778 stv0367_writereg(state, def0367cab[i].addr, in stv0367cab_init()
2781 switch (state->config->ts_mode) { in stv0367cab_init()
2784 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x03); in stv0367cab_init()
2788 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x01); in stv0367cab_init()
2792 stv0367_writebits(state, F367CAB_OUTFORMAT, 0x00); in stv0367cab_init()
2796 switch (state->config->clk_pol) { in stv0367cab_init()
2798 stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x00); in stv0367cab_init()
2802 stv0367_writebits(state, F367CAB_CLK_POLARITY, 0x01); in stv0367cab_init()
2806 stv0367_writebits(state, F367CAB_SYNC_STRIP, 0x00); in stv0367cab_init()
2808 stv0367_writebits(state, F367CAB_CT_NBST, 0x01); in stv0367cab_init()
2810 stv0367_writebits(state, F367CAB_TS_SWAP, 0x01); in stv0367cab_init()
2812 stv0367_writebits(state, F367CAB_FIFO_BYPASS, 0x00); in stv0367cab_init()
2814 stv0367_writereg(state, R367CAB_ANACTRL, 0x00);/*PLL enabled and used */ in stv0367cab_init()
2816 cab_state->mclk = stv0367cab_get_mclk(fe, state->config->xtal); in stv0367cab_init()
2817 cab_state->adc_clk = stv0367cab_get_adc_freq(fe, state->config->xtal); in stv0367cab_init()
2822 enum stv0367_cab_signal_type stv0367cab_algo(struct stv0367_state *state, in stv0367cab_algo() argument
2825 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_algo()
2901 stv0367_writereg(state, R367CAB_CTRL_1, 0x04); in stv0367cab_algo()
2904 TrackAGCAccum = stv0367_readbits(state, F367CAB_AGC_ACCUMRSTSEL); in stv0367cab_algo()
2905 stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, 0x0); in stv0367cab_algo()
2907 stv0367_writebits(state, F367CAB_MODULUSMAP_EN, 0); in stv0367cab_algo()
2909 stv0367_writebits(state, F367CAB_SWEEP_EN, 0); in stv0367cab_algo()
2912 stv0367cab_set_derot_freq(state, cab_state->adc_clk, in stv0367cab_algo()
2913 (1000 * (s32)state->config->if_khz + cab_state->derot_offset)); in stv0367cab_algo()
2916 stv0367_writebits(state, F367CAB_ADJ_EN, 0); in stv0367cab_algo()
2917 stv0367_writebits(state, F367CAB_ALLPASSFILT_EN, 0); in stv0367cab_algo()
2928 stv0367_writereg(state, R367CAB_CTRL_1, 0x00); in stv0367cab_algo()
2930 QAM_Lock = stv0367_readbits(state, F367CAB_FSM_STATUS); in stv0367cab_algo()
2947 u32_tmp = stv0367_readbits(state, in stv0367cab_algo()
2949 (stv0367_readbits(state, in stv0367cab_algo()
2951 (stv0367_readbits(state, in stv0367cab_algo()
2955 u32_tmp = u32_tmp / (1 << (11 - stv0367_readbits(state, in stv0367cab_algo()
2958 if (u32_tmp < stv0367_readbits(state, in stv0367cab_algo()
2960 256 * stv0367_readbits(state, in stv0367cab_algo()
2968 tmp = stv0367_readreg(state, R367CAB_IT_STATUS1); in stv0367cab_algo()
2977 tmp = stv0367_readreg(state, R367CAB_IT_STATUS1); in stv0367cab_algo()
2979 tmp = stv0367_readreg(state, R367CAB_IT_STATUS2); in stv0367cab_algo()
2982 tmp = stv0367cab_get_derot_freq(state, cab_state->adc_clk); in stv0367cab_algo()
2991 QAMFEC_Lock = stv0367_readbits(state, in stv0367cab_algo()
2999 cab_state->spect_inv = stv0367_readbits(state, in stv0367cab_algo()
3003 if (state->config->if_khz != 0) { in stv0367cab_algo()
3004 if (state->config->if_khz > cab_state->adc_clk / 1000) { in stv0367cab_algo()
3007 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_algo()
3008 - cab_state->adc_clk / 1000 + state->config->if_khz; in stv0367cab_algo()
3012 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_algo()
3013 + state->config->if_khz; in stv0367cab_algo()
3018 stv0367cab_get_derot_freq(state, in stv0367cab_algo()
3023 cab_state->symbol_rate = stv0367cab_GetSymbolRate(state, in stv0367cab_algo()
3076 stv0367_writebits(state, F367CAB_AGC_ACCUMRSTSEL, TrackAGCAccum); in stv0367cab_algo()
3083 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_set_frontend() local
3084 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_set_frontend()
3124 state, in stv0367cab_set_frontend()
3128 stv0367cab_set_srate(state, in stv0367cab_set_frontend()
3134 cab_state->state = stv0367cab_algo(state, p); in stv0367cab_set_frontend()
3141 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_get_frontend() local
3142 struct stv0367cab_state *cab_state = state->cab_state; in stv0367cab_get_frontend()
3148 p->symbol_rate = stv0367cab_GetSymbolRate(state, cab_state->mclk); in stv0367cab_get_frontend()
3150 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); in stv0367cab_get_frontend()
3175 if (state->config->if_khz == 0) { in stv0367cab_get_frontend()
3177 (stv0367cab_get_derot_freq(state, cab_state->adc_clk) - in stv0367cab_get_frontend()
3182 if (state->config->if_khz > cab_state->adc_clk / 1000) in stv0367cab_get_frontend()
3183 p->frequency += (state->config->if_khz in stv0367cab_get_frontend()
3184 - stv0367cab_get_derot_freq(state, cab_state->adc_clk) in stv0367cab_get_frontend()
3187 p->frequency += (state->config->if_khz in stv0367cab_get_frontend()
3188 - stv0367cab_get_derot_freq(state, cab_state->adc_clk)); in stv0367cab_get_frontend()
3194 void stv0367cab_GetErrorCount(state, enum stv0367cab_mod QAMSize,
3197 stv0367cab_OptimiseNByteAndGetBER(state, QAMSize, symbol_rate, Monitor_results);
3198 stv0367cab_GetPacketsCount(state, Monitor_results);
3205 struct stv0367_state *state = fe->demodulator_priv;
3210 static s32 stv0367cab_get_rf_lvl(struct stv0367_state *state) in stv0367cab_get_rf_lvl() argument
3216 stv0367_writebits(state, F367CAB_STDBY_ADCGP, 0x0); in stv0367cab_get_rf_lvl()
3219 (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_LO) & 0x03) + in stv0367cab_get_rf_lvl()
3220 (stv0367_readbits(state, F367CAB_RF_AGC1_LEVEL_HI) << 2); in stv0367cab_get_rf_lvl()
3224 stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_LO) + in stv0367cab_get_rf_lvl()
3225 (stv0367_readbits(state, F367CAB_AGC_IF_PWMCMD_HI) << 8); in stv0367cab_get_rf_lvl()
3258 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_strength() local
3260 s32 signal = stv0367cab_get_rf_lvl(state); in stv0367cab_read_strength()
3276 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_snr() local
3282 QAMSize = stv0367_readbits(state, F367CAB_QAM_MODE); in stv0367cab_read_snr()
3314 regval += (stv0367_readbits(state, F367CAB_SNR_LO) in stv0367cab_read_snr()
3315 + 256 * stv0367_readbits(state, F367CAB_SNR_HI)); in stv0367cab_read_snr()
3321 * (1 << (3 + stv0367_readbits(state, F367CAB_SNR_PER))); in stv0367cab_read_snr()
3366 struct stv0367_state *state = fe->demodulator_priv; in stv0367cab_read_ucblcks() local
3369 *ucblocks = (stv0367_readreg(state, R367CAB_RS_COUNTER_5) << 8) in stv0367cab_read_ucblcks()
3370 | stv0367_readreg(state, R367CAB_RS_COUNTER_4); in stv0367cab_read_ucblcks()
3371 corrected = (stv0367_readreg(state, R367CAB_RS_COUNTER_3) << 8) in stv0367cab_read_ucblcks()
3372 | stv0367_readreg(state, R367CAB_RS_COUNTER_2); in stv0367cab_read_ucblcks()
3373 tscount = (stv0367_readreg(state, R367CAB_RS_COUNTER_2) << 8) in stv0367cab_read_ucblcks()
3374 | stv0367_readreg(state, R367CAB_RS_COUNTER_1); in stv0367cab_read_ucblcks()
3413 struct stv0367_state *state = NULL; in stv0367cab_attach() local
3417 state = kzalloc(sizeof(struct stv0367_state), GFP_KERNEL); in stv0367cab_attach()
3418 if (state == NULL) in stv0367cab_attach()
3425 state->i2c = i2c; in stv0367cab_attach()
3426 state->config = config; in stv0367cab_attach()
3428 state->cab_state = cab_state; in stv0367cab_attach()
3429 state->fe.ops = stv0367cab_ops; in stv0367cab_attach()
3430 state->fe.demodulator_priv = state; in stv0367cab_attach()
3431 state->chip_id = stv0367_readreg(state, 0xf000); in stv0367cab_attach()
3433 dprintk("%s: chip_id = 0x%x\n", __func__, state->chip_id); in stv0367cab_attach()
3436 if ((state->chip_id != 0x50) && (state->chip_id != 0x60)) in stv0367cab_attach()
3439 return &state->fe; in stv0367cab_attach()
3443 kfree(state); in stv0367cab_attach()